1 /*
2  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 
30 #ifndef PORTMACRO_H
31 #define PORTMACRO_H
32 
33 /* *INDENT-OFF* */
34 #ifdef __cplusplus
35     extern "C" {
36 #endif
37 /* *INDENT-ON* */
38 
39 /*-----------------------------------------------------------
40  * Port specific definitions.
41  *
42  * The settings in this file configure FreeRTOS correctly for the
43  * given hardware and compiler.
44  *
45  * These settings should not be altered.
46  *-----------------------------------------------------------
47  */
48 
49 /* Type definitions. */
50 #define portCHAR          char
51 #define portFLOAT         float
52 #define portDOUBLE        double
53 #define portLONG          long
54 #define portSHORT         short
55 #define portSTACK_TYPE    uint32_t
56 #define portBASE_TYPE     long
57 
58 typedef portSTACK_TYPE   StackType_t;
59 typedef long             BaseType_t;
60 typedef unsigned long    UBaseType_t;
61 
62 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
63     typedef uint16_t     TickType_t;
64     #define portMAX_DELAY              ( TickType_t ) 0xffff
65 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
66     typedef uint32_t     TickType_t;
67     #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
68 
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
70  * not need to be guarded with a critical section. */
71     #define portTICK_TYPE_IS_ATOMIC    1
72 #else
73     #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
74 #endif
75 /*-----------------------------------------------------------*/
76 
77 /* MPU specific constants. */
78 #define portUSING_MPU_WRAPPERS                                   1
79 #define portPRIVILEGE_BIT                                        ( 0x80000000UL )
80 
81 #define portMPU_REGION_READ_WRITE                                ( 0x03UL << 24UL )
82 #define portMPU_REGION_PRIVILEGED_READ_ONLY                      ( 0x05UL << 24UL )
83 #define portMPU_REGION_READ_ONLY                                 ( 0x06UL << 24UL )
84 #define portMPU_REGION_PRIVILEGED_READ_WRITE                     ( 0x01UL << 24UL )
85 #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY    ( 0x02UL << 24UL )
86 #define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
87 #define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
88 
89 #define portSTACK_REGION                                         ( 3UL )
90 #define portGENERAL_PERIPHERALS_REGION                           ( 4UL )
91 #define portUNPRIVILEGED_FLASH_REGION                            ( 5UL )
92 #define portPRIVILEGED_FLASH_REGION                              ( 6UL )
93 #define portPRIVILEGED_RAM_REGION                                ( 7UL )
94 #define portFIRST_CONFIGURABLE_REGION                            ( 0UL )
95 #define portLAST_CONFIGURABLE_REGION                             ( 2UL )
96 #define portNUM_CONFIGURABLE_REGIONS                             ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
97 #define portTOTAL_NUM_REGIONS_IN_TCB                             ( portNUM_CONFIGURABLE_REGIONS + 1 )     /* Plus one to make space for the stack region. */
98 
99 typedef struct MPU_REGION_REGISTERS
100 {
101     uint32_t ulRegionBaseAddress;
102     uint32_t ulRegionAttribute;
103 } xMPU_REGION_REGISTERS;
104 
105 typedef struct MPU_REGION_SETTINGS
106 {
107     uint32_t ulRegionStartAddress;
108     uint32_t ulRegionEndAddress;
109     uint32_t ulRegionPermissions;
110 } xMPU_REGION_SETTINGS;
111 
112 #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
113 
114     #ifndef configSYSTEM_CALL_STACK_SIZE
115         #error configSYSTEM_CALL_STACK_SIZE must be defined to the desired size of the system call stack in words for using MPU wrappers v2.
116     #endif
117 
118     typedef struct SYSTEM_CALL_STACK_INFO
119     {
120         uint32_t ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE ];
121         uint32_t * pulSystemCallStack;
122         uint32_t * pulTaskStack;
123         uint32_t ulLinkRegisterAtSystemCallEntry;
124     } xSYSTEM_CALL_STACK_INFO;
125 
126 #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
127 
128 /*
129  * +------------------------------+-------------------------------+-----+
130  * |  CONTROL, r4-r11, EXC_RETURN | PSP, r0-r3, r12, LR, PC, xPSR |     |
131  * +------------------------------+-------------------------------+-----+
132  *
133  * <-----------------------------><-------------------------------><---->
134  *                10                             9                   1
135  */
136 #define MAX_CONTEXT_SIZE                    ( 20 )
137 
138 /* Size of an Access Control List (ACL) entry in bits. */
139 #define portACL_ENTRY_SIZE_BITS             ( 32U )
140 
141 /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */
142 #define portSTACK_FRAME_HAS_PADDING_FLAG    ( 1UL << 0UL )
143 #define portTASK_IS_PRIVILEGED_FLAG         ( 1UL << 1UL )
144 
145 typedef struct MPU_SETTINGS
146 {
147     xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ];
148     xMPU_REGION_SETTINGS xRegionSettings[ portTOTAL_NUM_REGIONS_IN_TCB ];
149     uint32_t ulContext[ MAX_CONTEXT_SIZE ];
150     uint32_t ulTaskFlags;
151 
152     #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
153         xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo;
154         #if ( configENABLE_ACCESS_CONTROL_LIST == 1 )
155             uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ];
156         #endif
157     #endif
158 } xMPU_SETTINGS;
159 
160 /* Architecture specifics. */
161 #define portSTACK_GROWTH      ( -1 )
162 #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
163 #define portBYTE_ALIGNMENT    8
164 #define portDONT_DISCARD      __attribute__( ( used ) )
165 /*-----------------------------------------------------------*/
166 
167 /* SVC numbers for various services. */
168 #define portSVC_START_SCHEDULER        100
169 #define portSVC_YIELD                  101
170 #define portSVC_RAISE_PRIVILEGE        102
171 #define portSVC_SYSTEM_CALL_EXIT       103
172 
173 /* Scheduler utilities. */
174 
175 #define portYIELD()    __asm volatile ( "   SVC %0  \n" ::"i" ( portSVC_YIELD ) : "memory" )
176 #define portYIELD_WITHIN_API()                          \
177     {                                                   \
178         /* Set a PendSV to request a context switch. */ \
179         portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
180                                                         \
181         /* Barriers are normally not required but do ensure the code is completely \
182          * within the specified behaviour for the architecture. */ \
183         __asm volatile ( "dsb" ::: "memory" );                     \
184         __asm volatile ( "isb" );                                  \
185     }
186 
187 #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
188 #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
189 #define portEND_SWITCHING_ISR( xSwitchRequired )            \
190     do                                                      \
191     {                                                       \
192         if( xSwitchRequired )                               \
193         {                                                   \
194             traceISR_EXIT_TO_SCHEDULER();                   \
195             portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
196         }                                                   \
197         else                                                \
198         {                                                   \
199             traceISR_EXIT();                                \
200         }                                                   \
201     } while( 0 )
202 #define portYIELD_FROM_ISR( x )    portEND_SWITCHING_ISR( x )
203 /*-----------------------------------------------------------*/
204 
205 /* Critical section management. */
206 extern void vPortEnterCritical( void );
207 extern void vPortExitCritical( void );
208 #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
209 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
210 #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
211 #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
212 #define portENTER_CRITICAL()                      vPortEnterCritical()
213 #define portEXIT_CRITICAL()                       vPortExitCritical()
214 
215 /*-----------------------------------------------------------*/
216 
217 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
218  * not necessary for to use this port.  They are defined so the common demo files
219  * (which build with all the ports) will build. */
220 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
221 #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
222 /*-----------------------------------------------------------*/
223 
224 /* Architecture specific optimisations. */
225 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
226     #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
227 #endif
228 
229 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
230 
231 /* Generic helper function. */
ucPortCountLeadingZeros(uint32_t ulBitmap)232     __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
233     {
234         uint8_t ucReturn;
235 
236         __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
237 
238         return ucReturn;
239     }
240 
241 /* Check the configuration. */
242     #if ( configMAX_PRIORITIES > 32 )
243         #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
244     #endif
245 
246 /* Store/clear the ready priorities in a bit map. */
247     #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
248     #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
249 
250 /*-----------------------------------------------------------*/
251 
252     #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
253 
254 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
255 
256 /*-----------------------------------------------------------*/
257 
258 #if ( configASSERT_DEFINED == 1 )
259     void vPortValidateInterruptPriority( void );
260     #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
261 #endif
262 
263 /* portNOP() is not required by this port. */
264 #define portNOP()
265 
266 #define portINLINE              __inline
267 
268 #ifndef portFORCE_INLINE
269     #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
270 #endif
271 /*-----------------------------------------------------------*/
272 
273 extern BaseType_t xIsPrivileged( void );
274 extern void vResetPrivilege( void );
275 extern void vPortSwitchToUserMode( void );
276 
277 /**
278  * @brief Checks whether or not the processor is privileged.
279  *
280  * @return 1 if the processor is already privileged, 0 otherwise.
281  */
282 #define portIS_PRIVILEGED()          xIsPrivileged()
283 
284 /**
285  * @brief Raise an SVC request to raise privilege.
286  */
287 #define portRAISE_PRIVILEGE()        __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
288 
289 /**
290  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
291  * register.
292  */
293 #define portRESET_PRIVILEGE()        vResetPrivilege()
294 
295 /**
296  * @brief Make a task unprivileged.
297  *
298  * It must be called from privileged tasks only. Calling it from unprivileged
299  * task will result in a memory protection fault.
300  */
301 #define portSWITCH_TO_USER_MODE()    vPortSwitchToUserMode()
302 /*-----------------------------------------------------------*/
303 
304 extern BaseType_t xPortIsTaskPrivileged( void );
305 
306 /**
307  * @brief Checks whether or not the calling task is privileged.
308  *
309  * @return pdTRUE if the calling task is privileged, pdFALSE otherwise.
310  */
311 #define portIS_TASK_PRIVILEGED()    xPortIsTaskPrivileged()
312 /*-----------------------------------------------------------*/
313 
xPortIsInsideInterrupt(void)314 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
315 {
316     uint32_t ulCurrentInterrupt;
317     BaseType_t xReturn;
318 
319     /* Obtain the number of the currently executing interrupt. */
320     __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
321 
322     if( ulCurrentInterrupt == 0 )
323     {
324         xReturn = pdFALSE;
325     }
326     else
327     {
328         xReturn = pdTRUE;
329     }
330 
331     return xReturn;
332 }
333 
334 /*-----------------------------------------------------------*/
335 
vPortRaiseBASEPRI(void)336 portFORCE_INLINE static void vPortRaiseBASEPRI( void )
337 {
338     uint32_t ulNewBASEPRI;
339 
340     __asm volatile
341     (
342         "   mov %0, %1                                              \n" \
343         "   msr basepri, %0                                         \n" \
344         "   isb                                                     \n" \
345         "   dsb                                                     \n" \
346         : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
347     );
348 }
349 
350 /*-----------------------------------------------------------*/
351 
ulPortRaiseBASEPRI(void)352 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
353 {
354     uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
355 
356     __asm volatile
357     (
358         "   mrs %0, basepri                                         \n" \
359         "   mov %1, %2                                              \n" \
360         "   msr basepri, %1                                         \n" \
361         "   isb                                                     \n" \
362         "   dsb                                                     \n" \
363         : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
364     );
365 
366     /* This return will not be reached but is necessary to prevent compiler
367      * warnings. */
368     return ulOriginalBASEPRI;
369 }
370 /*-----------------------------------------------------------*/
371 
vPortSetBASEPRI(uint32_t ulNewMaskValue)372 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
373 {
374     __asm volatile
375     (
376         "   msr basepri, %0 " ::"r" ( ulNewMaskValue ) : "memory"
377     );
378 }
379 /*-----------------------------------------------------------*/
380 
381 #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
382 
383 #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
384     #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. *www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
385     #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY    0
386 #endif
387 /*-----------------------------------------------------------*/
388 
389 /* *INDENT-OFF* */
390 #ifdef __cplusplus
391     }
392 #endif
393 /* *INDENT-ON* */
394 
395 #endif /* PORTMACRO_H */
396