1 /* 2 * FreeRTOS Kernel <DEVELOPMENT BRANCH> 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * Copyright 2024 Arm Limited and/or its affiliates 5 * <open-source-office@arm.com> 6 * 7 * SPDX-License-Identifier: MIT 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy of 10 * this software and associated documentation files (the "Software"), to deal in 11 * the Software without restriction, including without limitation the rights to 12 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 13 * the Software, and to permit persons to whom the Software is furnished to do so, 14 * subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in all 17 * copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 21 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 22 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 23 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 24 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 * https://www.FreeRTOS.org 27 * https://github.com/FreeRTOS 28 * 29 */ 30 31 #ifndef PORTMACROCOMMON_H 32 #define PORTMACROCOMMON_H 33 34 /* *INDENT-OFF* */ 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 /* *INDENT-ON* */ 39 40 /*------------------------------------------------------------------------------ 41 * Port specific definitions. 42 * 43 * The settings in this file configure FreeRTOS correctly for the given hardware 44 * and compiler. 45 * 46 * These settings should not be altered. 47 *------------------------------------------------------------------------------ 48 */ 49 50 #ifndef configENABLE_FPU 51 #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. 52 #endif /* configENABLE_FPU */ 53 54 #ifndef configENABLE_MPU 55 #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. 56 #endif /* configENABLE_MPU */ 57 58 #ifndef configENABLE_TRUSTZONE 59 #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. 60 #endif /* configENABLE_TRUSTZONE */ 61 62 /*-----------------------------------------------------------*/ 63 64 /** 65 * @brief Type definitions. 66 */ 67 #define portCHAR char 68 #define portFLOAT float 69 #define portDOUBLE double 70 #define portLONG long 71 #define portSHORT short 72 #define portSTACK_TYPE uint32_t 73 #define portBASE_TYPE long 74 75 typedef portSTACK_TYPE StackType_t; 76 typedef long BaseType_t; 77 typedef unsigned long UBaseType_t; 78 79 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) 80 typedef uint16_t TickType_t; 81 #define portMAX_DELAY ( TickType_t ) 0xffff 82 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) 83 typedef uint32_t TickType_t; 84 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 85 86 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 87 * not need to be guarded with a critical section. */ 88 #define portTICK_TYPE_IS_ATOMIC 1 89 #else 90 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. 91 #endif 92 /*-----------------------------------------------------------*/ 93 94 /** 95 * Architecture specifics. 96 */ 97 #define portSTACK_GROWTH ( -1 ) 98 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 99 #define portBYTE_ALIGNMENT 8 100 #define portNOP() 101 #define portINLINE __inline 102 #ifndef portFORCE_INLINE 103 #define portFORCE_INLINE inline __attribute__( ( always_inline ) ) 104 #endif 105 #define portHAS_STACK_OVERFLOW_CHECKING 1 106 /*-----------------------------------------------------------*/ 107 108 /** 109 * @brief Extern declarations. 110 */ 111 extern BaseType_t xPortIsInsideInterrupt( void ); 112 113 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; 114 115 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; 116 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; 117 118 extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; 119 extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; 120 121 #if ( configENABLE_TRUSTZONE == 1 ) 122 extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ 123 extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; 124 #endif /* configENABLE_TRUSTZONE */ 125 126 #if ( configENABLE_MPU == 1 ) 127 extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; 128 extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; 129 #endif /* configENABLE_MPU */ 130 131 #if ( configENABLE_PAC == 1 ) 132 133 /** 134 * @brief Generates 128-bit task's random PAC key. 135 * 136 * @param[out] pulTaskPacKey Pointer to a 4-word (128-bits) array to be 137 * filled with a 128-bit random number. 138 */ 139 void vApplicationGenerateTaskRandomPacKey( uint32_t * pulTaskPacKey ); 140 141 #endif /* configENABLE_PAC */ 142 /*-----------------------------------------------------------*/ 143 144 /** 145 * @brief MPU specific constants. 146 */ 147 #if ( configENABLE_MPU == 1 ) 148 #define portUSING_MPU_WRAPPERS 1 149 #define portPRIVILEGE_BIT ( 0x80000000UL ) 150 #else 151 #define portPRIVILEGE_BIT ( 0x0UL ) 152 #endif /* configENABLE_MPU */ 153 154 /* MPU settings that can be overridden in FreeRTOSConfig.h. */ 155 #ifndef configTOTAL_MPU_REGIONS 156 /* Define to 8 for backward compatibility. */ 157 #define configTOTAL_MPU_REGIONS ( 8UL ) 158 #endif 159 160 /* MPU regions. */ 161 #define portPRIVILEGED_FLASH_REGION ( 0UL ) 162 #define portUNPRIVILEGED_FLASH_REGION ( 1UL ) 163 #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) 164 #define portPRIVILEGED_RAM_REGION ( 3UL ) 165 #define portSTACK_REGION ( 4UL ) 166 #define portFIRST_CONFIGURABLE_REGION ( 5UL ) 167 #define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL ) 168 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) 169 #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ 170 171 /* Device memory attributes used in MPU_MAIR registers. 172 * 173 * 8-bit values encoded as follows: 174 * Bit[7:4] - 0000 - Device Memory 175 * Bit[3:2] - 00 --> Device-nGnRnE 176 * 01 --> Device-nGnRE 177 * 10 --> Device-nGRE 178 * 11 --> Device-GRE 179 * Bit[1:0] - 00, Reserved. 180 */ 181 #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ 182 #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ 183 #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ 184 #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ 185 186 /* Normal memory attributes used in MPU_MAIR registers. */ 187 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ 188 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ 189 190 /* Attributes used in MPU_RBAR registers. */ 191 #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) 192 #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) 193 #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) 194 195 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) 196 #define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) 197 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) 198 #define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) 199 200 #define portMPU_REGION_EXECUTE_NEVER ( 1UL ) 201 /*-----------------------------------------------------------*/ 202 203 #if ( configENABLE_MPU == 1 ) 204 205 /** 206 * @brief Settings to define an MPU region. 207 */ 208 typedef struct MPURegionSettings 209 { 210 uint32_t ulRBAR; /**< RBAR for the region. */ 211 uint32_t ulRLAR; /**< RLAR for the region. */ 212 } MPURegionSettings_t; 213 214 #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) 215 216 #ifndef configSYSTEM_CALL_STACK_SIZE 217 #error configSYSTEM_CALL_STACK_SIZE must be defined to the desired size of the system call stack in words for using MPU wrappers v2. 218 #endif 219 220 /** 221 * @brief System call stack. 222 */ 223 typedef struct SYSTEM_CALL_STACK_INFO 224 { 225 uint32_t ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE ]; 226 uint32_t * pulSystemCallStack; 227 uint32_t * pulSystemCallStackLimit; 228 uint32_t * pulTaskStack; 229 uint32_t ulLinkRegisterAtSystemCallEntry; 230 uint32_t ulStackLimitRegisterAtSystemCallEntry; 231 } xSYSTEM_CALL_STACK_INFO; 232 233 #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ 234 235 /** 236 * @brief MPU settings as stored in the TCB. 237 */ 238 #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) 239 240 #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) 241 242 /* 243 * +-----------+---------------+----------+-----------------+------------------------------+------------+-----+ 244 * | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | TaskPacKey | | 245 * | | | | PC, xPSR | CONTROL, EXC_RETURN | | | 246 * +-----------+---------------+----------+-----------------+------------------------------+------------+-----+ 247 * 248 * <-----------><--------------><---------><----------------><-----------------------------><-----------><----> 249 * 16 17 8 8 5 16 1 250 */ 251 #define MAX_CONTEXT_SIZE 71 252 253 #elif ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 0 ) ) 254 255 /* 256 * +-----------+---------------+----------+-----------------+------------------------------+-----+ 257 * | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | | 258 * | | | | PC, xPSR | CONTROL, EXC_RETURN | | 259 * +-----------+---------------+----------+-----------------+------------------------------+-----+ 260 * 261 * <-----------><--------------><---------><----------------><-----------------------------><----> 262 * 16 17 8 8 5 1 263 */ 264 #define MAX_CONTEXT_SIZE 55 265 266 #elif ( ( configENABLE_TRUSTZONE == 0 ) && ( configENABLE_PAC == 1 ) ) 267 268 /* 269 * +-----------+---------------+----------+-----------------+----------------------+------------+-----+ 270 * | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | TaskPacKey | | 271 * | | | | PC, xPSR | EXC_RETURN | | | 272 * +-----------+---------------+----------+-----------------+----------------------+------------+-----+ 273 * 274 * <-----------><--------------><---------><----------------><---------------------><-----------><----> 275 * 16 17 8 8 4 16 1 276 */ 277 #define MAX_CONTEXT_SIZE 70 278 279 #else /* if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */ 280 281 /* 282 * +-----------+---------------+----------+-----------------+----------------------+-----+ 283 * | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | | 284 * | | | | PC, xPSR | EXC_RETURN | | 285 * +-----------+---------------+----------+-----------------+----------------------+-----+ 286 * 287 * <-----------><--------------><---------><----------------><---------------------><----> 288 * 16 17 8 8 4 1 289 */ 290 #define MAX_CONTEXT_SIZE 54 291 292 #endif /* #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */ 293 294 #else /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ 295 296 #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) 297 298 /* 299 * +----------+-----------------+------------------------------+------------+-----+ 300 * | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | TaskPacKey | | 301 * | | PC, xPSR | CONTROL, EXC_RETURN | | | 302 * +----------+-----------------+------------------------------+------------+-----+ 303 * 304 * <---------><----------------><------------------------------><-----------><----> 305 * 8 8 5 16 1 306 */ 307 #define MAX_CONTEXT_SIZE 38 308 309 #elif ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 0 ) ) 310 311 /* 312 * +----------+-----------------+------------------------------+-----+ 313 * | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | | 314 * | | PC, xPSR | CONTROL, EXC_RETURN | | 315 * +----------+-----------------+------------------------------+-----+ 316 * 317 * <---------><----------------><------------------------------><----> 318 * 8 8 5 1 319 */ 320 #define MAX_CONTEXT_SIZE 22 321 322 #elif ( ( configENABLE_TRUSTZONE == 0 ) && ( configENABLE_PAC == 1 ) ) 323 324 /* 325 * +----------+-----------------+----------------------+------------+-----+ 326 * | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | TaskPacKey | | 327 * | | PC, xPSR | EXC_RETURN | | | 328 * +----------+-----------------+----------------------+------------+-----+ 329 * 330 * <---------><----------------><----------------------><-----------><----> 331 * 8 8 4 16 1 332 */ 333 #define MAX_CONTEXT_SIZE 37 334 335 #else /* #if( configENABLE_TRUSTZONE == 1 ) */ 336 337 /* 338 * +----------+-----------------+----------------------+-----+ 339 * | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | | 340 * | | PC, xPSR | EXC_RETURN | | 341 * +----------+-----------------+----------------------+-----+ 342 * 343 * <---------><----------------><----------------------><----> 344 * 8 8 4 1 345 */ 346 #define MAX_CONTEXT_SIZE 21 347 348 #endif /* #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */ 349 350 #endif /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ 351 352 /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */ 353 #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) 354 #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) 355 356 /* Size of an Access Control List (ACL) entry in bits. */ 357 #define portACL_ENTRY_SIZE_BITS ( 32U ) 358 359 typedef struct MPU_SETTINGS 360 { 361 uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ 362 MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ 363 uint32_t ulContext[ MAX_CONTEXT_SIZE ]; 364 uint32_t ulTaskFlags; 365 366 #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) 367 xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; 368 #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) 369 uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; 370 #endif 371 #endif 372 } xMPU_SETTINGS; 373 374 #endif /* configENABLE_MPU == 1 */ 375 /*-----------------------------------------------------------*/ 376 377 /** 378 * @brief Validate priority of ISRs that are allowed to call FreeRTOS 379 * system calls. 380 */ 381 #if ( configASSERT_DEFINED == 1 ) 382 #if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 ) 383 void vPortValidateInterruptPriority( void ); 384 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 385 #endif 386 #endif 387 388 /** 389 * @brief SVC numbers. 390 */ 391 #define portSVC_ALLOCATE_SECURE_CONTEXT 100 392 #define portSVC_FREE_SECURE_CONTEXT 101 393 #define portSVC_START_SCHEDULER 102 394 #define portSVC_RAISE_PRIVILEGE 103 395 #define portSVC_SYSTEM_CALL_EXIT 104 396 #define portSVC_YIELD 105 397 /*-----------------------------------------------------------*/ 398 399 /** 400 * @brief Scheduler utilities. 401 */ 402 #if ( configENABLE_MPU == 1 ) 403 #define portYIELD() __asm volatile ( "svc %0" ::"i" ( portSVC_YIELD ) : "memory" ) 404 #define portYIELD_WITHIN_API() vPortYield() 405 #else 406 #define portYIELD() vPortYield() 407 #define portYIELD_WITHIN_API() vPortYield() 408 #endif 409 410 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) 411 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) 412 #define portEND_SWITCHING_ISR( xSwitchRequired ) \ 413 do \ 414 { \ 415 if( xSwitchRequired ) \ 416 { \ 417 traceISR_EXIT_TO_SCHEDULER(); \ 418 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ 419 } \ 420 else \ 421 { \ 422 traceISR_EXIT(); \ 423 } \ 424 } while( 0 ) 425 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 426 /*-----------------------------------------------------------*/ 427 428 /** 429 * @brief Critical section management. 430 */ 431 #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() 432 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x ) 433 #define portENTER_CRITICAL() vPortEnterCritical() 434 #define portEXIT_CRITICAL() vPortExitCritical() 435 /*-----------------------------------------------------------*/ 436 437 /** 438 * @brief Tickless idle/low power functionality. 439 */ 440 #ifndef portSUPPRESS_TICKS_AND_SLEEP 441 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); 442 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) 443 #endif 444 /*-----------------------------------------------------------*/ 445 446 /** 447 * @brief Task function macros as described on the FreeRTOS.org WEB site. 448 */ 449 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 450 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 451 /*-----------------------------------------------------------*/ 452 453 #if ( configENABLE_TRUSTZONE == 1 ) 454 455 /** 456 * @brief Allocate a secure context for the task. 457 * 458 * Tasks are not created with a secure context. Any task that is going to call 459 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a 460 * secure context before it calls any secure function. 461 * 462 * @param[in] ulSecureStackSize The size of the secure stack to be allocated. 463 */ 464 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize ) 465 466 /** 467 * @brief Called when a task is deleted to delete the task's secure context, 468 * if it has one. 469 * 470 * @param[in] pxTCB The TCB of the task being deleted. 471 */ 472 #define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) 473 #endif /* configENABLE_TRUSTZONE */ 474 /*-----------------------------------------------------------*/ 475 476 #if ( configENABLE_MPU == 1 ) 477 478 /** 479 * @brief Checks whether or not the processor is privileged. 480 * 481 * @return 1 if the processor is already privileged, 0 otherwise. 482 */ 483 #define portIS_PRIVILEGED() xIsPrivileged() 484 485 /** 486 * @brief Raise an SVC request to raise privilege. 487 * 488 * The SVC handler checks that the SVC was raised from a system call and only 489 * then it raises the privilege. If this is called from any other place, 490 * the privilege is not raised. 491 */ 492 #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" ); 493 494 /** 495 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL 496 * register. 497 */ 498 #define portRESET_PRIVILEGE() vResetPrivilege() 499 #else 500 #define portIS_PRIVILEGED() 501 #define portRAISE_PRIVILEGE() 502 #define portRESET_PRIVILEGE() 503 #endif /* configENABLE_MPU */ 504 /*-----------------------------------------------------------*/ 505 506 #if ( configENABLE_MPU == 1 ) 507 508 extern BaseType_t xPortIsTaskPrivileged( void ); 509 510 /** 511 * @brief Checks whether or not the calling task is privileged. 512 * 513 * @return pdTRUE if the calling task is privileged, pdFALSE otherwise. 514 */ 515 #define portIS_TASK_PRIVILEGED() xPortIsTaskPrivileged() 516 517 #endif /* configENABLE_MPU == 1 */ 518 /*-----------------------------------------------------------*/ 519 520 /** 521 * @brief Barriers. 522 */ 523 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) 524 /*-----------------------------------------------------------*/ 525 526 /* Select correct value of configUSE_PORT_OPTIMISED_TASK_SELECTION 527 * based on whether or not Mainline extension is implemented. */ 528 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 529 #if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 ) 530 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 531 #else 532 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 533 #endif 534 #endif /* #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION */ 535 536 /** 537 * @brief Port-optimised task selection. 538 */ 539 #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 ) 540 541 /** 542 * @brief Count the number of leading zeros in a 32-bit value. 543 */ ulPortCountLeadingZeros(uint32_t ulBitmap)544 static portFORCE_INLINE uint32_t ulPortCountLeadingZeros( uint32_t ulBitmap ) 545 { 546 uint32_t ulReturn; 547 548 __asm volatile ( "clz %0, %1" : "=r" ( ulReturn ) : "r" ( ulBitmap ) : "memory" ); 549 550 return ulReturn; 551 } 552 553 /* Check the configuration. */ 554 #if ( configMAX_PRIORITIES > 32 ) 555 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice. 556 #endif 557 558 #if ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) 559 #error ARMv8-M baseline implementations (such as Cortex-M23) do not support port-optimised task selection. Please set configUSE_PORT_OPTIMISED_TASK_SELECTION to 0 or leave it undefined. 560 #endif 561 562 /** 563 * @brief Store/clear the ready priorities in a bit map. 564 */ 565 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 566 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 567 568 /** 569 * @brief Get the priority of the highest-priority task that is ready to execute. 570 */ 571 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ulPortCountLeadingZeros( ( uxReadyPriorities ) ) ) 572 573 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 574 /*-----------------------------------------------------------*/ 575 576 /* *INDENT-OFF* */ 577 #ifdef __cplusplus 578 } 579 #endif 580 /* *INDENT-ON* */ 581 582 #endif /* PORTMACROCOMMON_H */ 583