1;/*
2; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4; *
5; * SPDX-License-Identifier: MIT
6; *
7; * Permission is hereby granted, free of charge, to any person obtaining a copy of
8; * this software and associated documentation files (the "Software"), to deal in
9; * the Software without restriction, including without limitation the rights to
10; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11; * the Software, and to permit persons to whom the Software is furnished to do so,
12; * subject to the following conditions:
13; *
14; * The above copyright notice and this permission notice shall be included in all
15; * copies or substantial portions of the Software.
16; *
17; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23; *
24; * https://www.FreeRTOS.org
25; * https://github.com/FreeRTOS
26; *
27; */
28
29    IMPORT  ulCriticalNesting       ;
30    IMPORT  pxCurrentTCB            ;
31
32
33    MACRO
34    portRESTORE_CONTEXT
35
36
37    LDR     R0, =pxCurrentTCB       ; Set the LR to the task stack.  The location was...
38    LDR     R0, [R0]                ; ... stored in pxCurrentTCB
39    LDR     LR, [R0]
40
41    LDR     R0, =ulCriticalNesting  ; The critical nesting depth is the first item on...
42    LDMFD   LR!, {R1}               ; ...the stack.  Load it into the ulCriticalNesting var.
43    STR     R1, [R0]                ;
44
45    LDMFD   LR!, {R0}               ; Get the SPSR from the stack.
46    MSR     SPSR_cxsf, R0           ;
47
48    LDMFD   LR, {R0-R14}^           ; Restore all system mode registers for the task.
49    NOP                             ;
50
51    LDR     LR, [LR, #+60]          ; Restore the return address
52
53                                    ; And return - correcting the offset in the LR to obtain ...
54    SUBS    PC, LR, #4              ; ...the correct address.
55
56    MEND
57
58; /**********************************************************************/
59
60    MACRO
61    portSAVE_CONTEXT
62
63
64    STMDB   SP!, {R0}               ; Store R0 first as we need to use it.
65
66    STMDB   SP,{SP}^                ; Set R0 to point to the task stack pointer.
67    NOP                             ;
68    SUB     SP, SP, #4              ;
69    LDMIA   SP!,{R0}                ;
70
71    STMDB   R0!, {LR}               ; Push the return address onto the stack.
72    MOV     LR, R0                  ; Now we have saved LR we can use it instead of R0.
73    LDMIA   SP!, {R0}               ; Pop R0 so we can save it onto the system mode stack.
74
75    STMDB   LR,{R0-LR}^             ; Push all the system mode registers onto the task stack.
76    NOP                             ;
77    SUB     LR, LR, #60             ;
78
79    MRS     R0, SPSR                ; Push the SPSR onto the task stack.
80    STMDB   LR!, {R0}               ;
81
82    LDR     R0, =ulCriticalNesting  ;
83    LDR     R0, [R0]                ;
84    STMDB   LR!, {R0}               ;
85
86    LDR     R0, =pxCurrentTCB       ; Store the new top of stack for the task.
87    LDR     R1, [R0]                ;
88    STR     LR, [R1]                ;
89
90    MEND
91
92    END
93