Lines Matching refs:ctx
81 #define CONFIGPAGE_OFF(ctx) ((ctx)->lowmem - 4*KB) argument
82 #define VSBL_ENTRY_OFF(ctx) ((ctx)->lowmem - 6*KB) argument
83 #define BOOTARGS_OFF(ctx) ((ctx)->lowmem - 8*KB) argument
84 #define E820_TABLE_OFF(ctx) ((ctx)->lowmem - 12*KB) argument
85 #define GUEST_PART_INFO_OFF(ctx) ((ctx)->lowmem - 16*KB) argument
87 #define VSBL_TOP(ctx) (64*MB) argument
114 extern int init_cmos_vrpmb(struct vmctx *ctx);
143 acrn_prepare_guest_part_info(struct vmctx *ctx) in acrn_prepare_guest_part_info() argument
165 if ((len + GUEST_PART_INFO_OFF(ctx)) > BOOTARGS_OFF(ctx)) { in acrn_prepare_guest_part_info()
172 read = fread(ctx->baseaddr + GUEST_PART_INFO_OFF(ctx), in acrn_prepare_guest_part_info()
182 GUEST_PART_INFO_OFF(ctx)); in acrn_prepare_guest_part_info()
205 acrn_prepare_vsbl(struct vmctx *ctx) in acrn_prepare_vsbl() argument
226 read = fread(ctx->baseaddr + VSBL_TOP(ctx) - vsbl_size, in acrn_prepare_vsbl()
235 vsbl_path, vsbl_size, VSBL_TOP(ctx) - vsbl_size); in acrn_prepare_vsbl()
241 acrn_sw_load_vsbl(struct vmctx *ctx) in acrn_sw_load_vsbl() argument
247 init_cmos_vrpmb(ctx); in acrn_sw_load_vsbl()
250 (ctx->baseaddr + CONFIGPAGE_OFF(ctx)); in acrn_sw_load_vsbl()
255 (ctx->baseaddr + E820_TABLE_OFF(ctx)); in acrn_sw_load_vsbl()
257 vsbl_para->e820_entries = acrn_create_e820_table(ctx, e820); in acrn_sw_load_vsbl()
258 vsbl_para->e820_table_address = E820_TABLE_OFF(ctx); in acrn_sw_load_vsbl()
264 strncpy(ctx->baseaddr + BOOTARGS_OFF(ctx), get_bootargs(), STR_LEN); in acrn_sw_load_vsbl()
265 vsbl_para->bootargs_address = BOOTARGS_OFF(ctx); in acrn_sw_load_vsbl()
271 ret = acrn_prepare_guest_part_info(ctx); in acrn_sw_load_vsbl()
274 vsbl_para->guest_part_info_address = GUEST_PART_INFO_OFF(ctx); in acrn_sw_load_vsbl()
281 ret = acrn_prepare_vsbl(ctx); in acrn_sw_load_vsbl()
285 vsbl_para->vsbl_address = VSBL_TOP(ctx) - vsbl_size; in acrn_sw_load_vsbl()
291 pr_info("SW_LOAD: vsbl_entry 0x%lx\n", VSBL_TOP(ctx) - 16); in acrn_sw_load_vsbl()
299 memset(&ctx->bsp_regs, 0, sizeof( struct acrn_vcpu_regs)); in acrn_sw_load_vsbl()
300 ctx->bsp_regs.vcpu_id = 0; in acrn_sw_load_vsbl()
303 ctx->bsp_regs.vcpu_regs.cr0 = 0x30U; in acrn_sw_load_vsbl()
304 ctx->bsp_regs.vcpu_regs.cs_ar = 0x009FU; in acrn_sw_load_vsbl()
305 ctx->bsp_regs.vcpu_regs.cs_sel = 0xF000U; in acrn_sw_load_vsbl()
306 ctx->bsp_regs.vcpu_regs.cs_limit = 0xFFFFU; in acrn_sw_load_vsbl()
307 ctx->bsp_regs.vcpu_regs.cs_base = (VSBL_TOP(ctx) - 16) &0xFFFF0000UL; in acrn_sw_load_vsbl()
308 ctx->bsp_regs.vcpu_regs.rip = (VSBL_TOP(ctx) - 16) & 0xFFFFUL; in acrn_sw_load_vsbl()
309 ctx->bsp_regs.vcpu_regs.gprs.rsi = CONFIGPAGE_OFF(ctx); in acrn_sw_load_vsbl()