Lines Matching refs:bytes
109 int func, int coff, int bytes, uint32_t *val);
196 CFGWRITE(struct pci_vdev *dev, int coff, uint32_t val, int bytes) in CFGWRITE() argument
198 if (bytes == 1) in CFGWRITE()
200 else if (bytes == 2) in CFGWRITE()
207 CFGREAD(struct pci_vdev *dev, int coff, int bytes) in CFGREAD() argument
209 if (bytes == 1) in CFGREAD()
211 else if (bytes == 2) in CFGREAD()
497 pci_emul_io_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes, in pci_emul_io_handler() argument
508 port + bytes <= pdi->bar[i].addr + pdi->bar[i].size) { in pci_emul_io_handler()
512 offset, bytes); in pci_emul_io_handler()
513 *eax = bar_value(bytes, *eax); in pci_emul_io_handler()
516 bytes, bar_value(bytes, *eax)); in pci_emul_io_handler()
1283 int bytes, uint32_t val) in msixcap_cfgwrite() argument
1290 if (off == 2 && bytes == 2) { in msixcap_cfgwrite()
1303 CFGWRITE(dev, offset, val, bytes); in msixcap_cfgwrite()
1308 int bytes, uint32_t val) in msicap_cfgwrite() argument
1318 if ((offset - capoff) == 2 && bytes == 2) { in msicap_cfgwrite()
1343 CFGWRITE(dev, offset, val, bytes); in msicap_cfgwrite()
1356 int bytes, uint32_t val) in pciecap_cfgwrite() argument
1359 CFGWRITE(dev, offset, val, bytes); in pciecap_cfgwrite()
1388 pci_emul_capwrite(struct pci_vdev *dev, int offset, int bytes, uint32_t val) in pci_emul_capwrite() argument
1394 if ((offset & (bytes - 1)) != 0) in pci_emul_capwrite()
1416 if (offset == capoff && bytes == 4) { in pci_emul_capwrite()
1417 bytes = 2; in pci_emul_capwrite()
1427 msicap_cfgwrite(dev, capoff, offset, bytes, val); in pci_emul_capwrite()
1430 msixcap_cfgwrite(dev, capoff, offset, bytes, val); in pci_emul_capwrite()
1433 pciecap_cfgwrite(dev, capoff, offset, bytes, val); in pci_emul_capwrite()
1436 CFGWRITE(dev, offset, val, bytes); in pci_emul_capwrite()
1470 int bytes, uint64_t *val, void *arg1, long arg2) in pci_emul_ecfg_handler() argument
1481 pci_cfgrw(ctx, vcpu, in, bus, slot, func, coff, bytes, (uint32_t *)val); in pci_emul_ecfg_handler()
2286 pci_emul_hdrtype_fixup(int bus, int slot, int off, int bytes, uint32_t *rv) in pci_emul_hdrtype_fixup() argument
2290 if (off <= PCIR_HDRTYPE && off + bytes > PCIR_HDRTYPE) { in pci_emul_hdrtype_fixup()
2292 switch (bytes) { in pci_emul_hdrtype_fixup()
2309 pci_emul_cmdsts_write(struct pci_vdev *dev, int coff, uint32_t new, int bytes) in pci_emul_cmdsts_write() argument
2326 old = CFGREAD(dev, coff, bytes); in pci_emul_cmdsts_write()
2329 CFGWRITE(dev, coff, new, bytes); /* update config */ in pci_emul_cmdsts_write()
2377 int coff, int bytes, uint32_t *eax) in pci_cfgrw() argument
2399 if (dev == NULL || (bytes != 1 && bytes != 2 && bytes != 4) || in pci_cfgrw()
2400 (coff & (bytes - 1)) != 0) { in pci_cfgrw()
2440 needcfg = ops->vdev_cfgread(ctx, vcpu, dev, coff, bytes, in pci_cfgrw()
2447 *eax = CFGREAD(dev, coff, bytes); in pci_cfgrw()
2449 pci_emul_hdrtype_fixup(bus, slot, coff, bytes, eax); in pci_cfgrw()
2454 coff, bytes, *eax) == 0) in pci_cfgrw()
2465 if (bytes != 4 || (coff & 0x3) != 0) in pci_cfgrw()
2554 pci_emul_capwrite(dev, coff, bytes, *eax); in pci_cfgrw()
2556 pci_emul_cmdsts_write(dev, coff, *eax, bytes); in pci_cfgrw()
2558 CFGWRITE(dev, coff, *eax, bytes); in pci_cfgrw()
2565 int func, int reg, int bytes, int *value) in emulate_pci_cfgrw() argument
2568 bytes, (uint32_t *)value); in emulate_pci_cfgrw()