Lines Matching refs:uint32_t
47 uint32_t mask; /* BAR size mask */
52 uint32_t data;
53 uint32_t vector_control;
59 uint32_t capoff;
60 uint32_t caplen;
68 uint32_t table_info; /* bar index and offset */
69 uint32_t pba_info; /* bar index and offset */
77 uint32_t capoff;
78 uint32_t caplen;
79 uint32_t table_bar;
80 uint32_t table_offset;
81 uint32_t table_count;
88 uint32_t capoff;
89 uint32_t caplen;
101 uint32_t data_32[PCIE_CONFIG_SPACE_SIZE >> 2U];
108 … int32_t (*write_vdev_cfg)(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
109 … int32_t (*read_vdev_cfg)(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val);
113 uint32_t id;
122 uint32_t flags;
125 uint32_t nr_bars; /* 6 for normal device, 2 for bridge, 1 for cardbus */
159 uint32_t value;
161 uint32_t reg_num : 8; /* BITs 0-7, Register Number (BITs 0-1, always reserve to 0) */
162 uint32_t bdf : 16; /* BITs 8-23, BDF Number */
163 uint32_t resv : 7; /* BITs 24-30, Reserved */
164 uint32_t enable : 1; /* BITs 31, Enable bit */