/* * Copyright (C) 2021-2022 Intel Corporation. * * SPDX-License-Identifier: BSD-3-Clause */ /* * BIOS Information * Vendor: American Megatrends International, LLC. * Version: E5000XXU3F00105-BPCIe * Release Date: 08/25/2021 * BIOS Revision: 5.19 * * Base Board Information * Manufacturer: Default string * Product Name: Default string * Version: Default string */ #ifndef PCI_DEVICES_H_ #define PCI_DEVICES_H_ #define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U} #define HOST_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x10U, .f = 0x05U} #define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U} #define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x0DU, .f = 0x00U} #define USB_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} #define SERIAL_BUS_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x10U, .f = 0x00U} #define SERIAL_BUS_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U} #define SERIAL_BUS_CONTROLLER_2 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U} #define RAM_MEMORY_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U} #define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U} #define SERIAL_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x03U} #define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U} #define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} #define PCI_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x07U} #define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} #define AUDIO_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U} #define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U} #define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x06U} #define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U} #define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x01U, .d = 0x00U, .f = 0x00U} #endif /* PCI_DEVICES_H_ */