1 /*
2 * Copyright (C) 2018-2022 Intel Corporation.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef VMEXIT_H_
8 #define VMEXIT_H_
9
10 struct vm_exit_dispatch {
11 int32_t (*handler)(struct acrn_vcpu *);
12 uint32_t need_exit_qualification;
13 };
14
15 int32_t vmexit_handler(struct acrn_vcpu *vcpu);
16 int32_t vmcall_vmexit_handler(struct acrn_vcpu *vcpu);
17 int32_t cpuid_vmexit_handler(struct acrn_vcpu *vcpu);
18 int32_t rdmsr_vmexit_handler(struct acrn_vcpu *vcpu);
19 int32_t wrmsr_vmexit_handler(struct acrn_vcpu *vcpu);
20
21 extern void vm_exit(void);
22 static inline uint64_t
vm_exit_qualification_bit_mask(uint64_t exit_qual,uint32_t msb,uint32_t lsb)23 vm_exit_qualification_bit_mask(uint64_t exit_qual, uint32_t msb, uint32_t lsb)
24 {
25 return (exit_qual &
26 (((1UL << (msb + 1U)) - 1UL) - ((1UL << lsb) - 1UL)));
27 }
28
29 /* access Control-Register Info using exit qualification field */
vm_exit_cr_access_cr_num(uint64_t exit_qual)30 static inline uint64_t vm_exit_cr_access_cr_num(uint64_t exit_qual)
31 {
32 return (vm_exit_qualification_bit_mask(exit_qual, 3U, 0U) >> 0U);
33 }
34
vm_exit_cr_access_type(uint64_t exit_qual)35 static inline uint64_t vm_exit_cr_access_type(uint64_t exit_qual)
36 {
37 return (vm_exit_qualification_bit_mask(exit_qual, 5U, 4U) >> 4U);
38 }
39
vm_exit_cr_access_lmsw_op(uint64_t exit_qual)40 static inline uint64_t vm_exit_cr_access_lmsw_op(uint64_t exit_qual)
41 {
42 return (vm_exit_qualification_bit_mask(exit_qual, 6U, 6U) >> 6U);
43 }
44
vm_exit_cr_access_reg_idx(uint64_t exit_qual)45 static inline uint64_t vm_exit_cr_access_reg_idx(uint64_t exit_qual)
46 {
47 return (vm_exit_qualification_bit_mask(exit_qual, 11U, 8U) >> 8U);
48 }
49
vm_exit_cr_access_lmsw_src_date(uint64_t exit_qual)50 static inline uint64_t vm_exit_cr_access_lmsw_src_date(uint64_t exit_qual)
51 {
52 return (vm_exit_qualification_bit_mask(exit_qual, 31U, 16U) >> 16U);
53 }
54
55 /* access IO Access Info using exit qualification field */
vm_exit_io_instruction_size(uint64_t exit_qual)56 static inline uint64_t vm_exit_io_instruction_size(uint64_t exit_qual)
57 {
58 return (vm_exit_qualification_bit_mask(exit_qual, 2U, 0U) >> 0U);
59 }
60
61 static inline uint64_t
vm_exit_io_instruction_access_direction(uint64_t exit_qual)62 vm_exit_io_instruction_access_direction(uint64_t exit_qual)
63 {
64 return (vm_exit_qualification_bit_mask(exit_qual, 3U, 3U) >> 3U);
65 }
66
vm_exit_io_instruction_is_string(uint64_t exit_qual)67 static inline uint64_t vm_exit_io_instruction_is_string(uint64_t exit_qual)
68 {
69 return (vm_exit_qualification_bit_mask(exit_qual, 4U, 4U) >> 4U);
70 }
71
72 static inline uint64_t
vm_exit_io_instruction_is_rep_prefixed(uint64_t exit_qual)73 vm_exit_io_instruction_is_rep_prefixed(uint64_t exit_qual)
74 {
75 return (vm_exit_qualification_bit_mask(exit_qual, 5U, 5U) >> 5U);
76 }
77
78 static inline uint64_t
vm_exit_io_instruction_is_operand_encoding(uint64_t exit_qual)79 vm_exit_io_instruction_is_operand_encoding(uint64_t exit_qual)
80 {
81 return (vm_exit_qualification_bit_mask(exit_qual, 6U, 6U) >> 6U);
82 }
83
vm_exit_io_instruction_port_number(uint64_t exit_qual)84 static inline uint64_t vm_exit_io_instruction_port_number(uint64_t exit_qual)
85 {
86 return (vm_exit_qualification_bit_mask(exit_qual, 31U, 16U) >> 16U);
87 }
88
89 #endif /* VMEXIT_H_ */
90