1 /*- 2 * Copyright (c) 1997, Stefan Esser <se@FreeBSD.ORG> 3 * Copyright (c) 1997, 1998, 1999, Kenneth D. Merry <ken@FreeBSD.ORG> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef _PCIIO_H_ 32 #define _PCIIO_H_ 33 34 #include "asm/ioctl.h" 35 36 #define PCI_MAXNAMELEN 16 37 38 typedef enum { 39 PCI_GETCONF_LAST_DEVICE, 40 PCI_GETCONF_LIST_CHANGED, 41 PCI_GETCONF_MORE_DEVS, 42 PCI_GETCONF_ERROR 43 } pci_getconf_status; 44 45 typedef enum { 46 PCI_GETCONF_NO_MATCH = 0x0000, 47 PCI_GETCONF_MATCH_DOMAIN = 0x0001, 48 PCI_GETCONF_MATCH_BUS = 0x0002, 49 PCI_GETCONF_MATCH_DEV = 0x0004, 50 PCI_GETCONF_MATCH_FUNC = 0x0008, 51 PCI_GETCONF_MATCH_NAME = 0x0010, 52 PCI_GETCONF_MATCH_UNIT = 0x0020, 53 PCI_GETCONF_MATCH_VENDOR = 0x0040, 54 PCI_GETCONF_MATCH_DEVICE = 0x0080, 55 PCI_GETCONF_MATCH_CLASS = 0x0100 56 } pci_getconf_flags; 57 58 struct pcisel { 59 u_int32_t domain; /* domain number */ 60 u_int8_t bus; /* bus number */ 61 u_int8_t dev; /* device on this bus */ 62 u_int8_t func; /* function on this device */ 63 }; 64 65 struct pci_conf { 66 struct pcisel sel; /* domain+bus+slot+function */ 67 u_int8_t hdr; /* PCI header type */ 68 u_int16_t subvendor; /* card vendor ID */ 69 u_int16_t subdevice; /* card device ID, assigned by 70 * card vendor 71 */ 72 u_int16_t vendor; /* chip vendor ID */ 73 u_int16_t device; /* chip device ID, assigned by 74 * chip vendor 75 */ 76 u_int8_t pc_class; /* chip PCI class */ 77 u_int8_t subclass; /* chip PCI subclass */ 78 u_int8_t progif; /* chip PCI programming interface */ 79 u_int8_t revid; /* chip revision ID */ 80 char pd_name[PCI_MAXNAMELEN + 1]; /* device name */ 81 u_long pd_unit; /* device unit number */ 82 }; 83 84 struct pci_match_conf { 85 struct pcisel sel; /* domain+bus+slot+function */ 86 char pd_name[PCI_MAXNAMELEN + 1]; /* device name */ 87 u_long pd_unit; /* Unit number */ 88 u_int16_t vendor; /* PCI Vendor ID */ 89 u_int16_t device; /* PCI Device ID */ 90 u_int8_t pc_class; /* PCI class */ 91 pci_getconf_flags flags; /* Matching expression */ 92 }; 93 94 struct pci_conf_io { 95 u_int32_t pat_buf_len; /* pattern buffer length */ 96 u_int32_t num_patterns; /* number of patterns */ 97 struct pci_match_conf *patterns; /* pattern buffer */ 98 u_int32_t match_buf_len; /* match buffer length */ 99 u_int32_t num_matches; /* number of matches returned */ 100 struct pci_conf *matches; /* match buffer */ 101 u_int32_t offset; /* offset into device list */ 102 u_int32_t generation; /* device list generation */ 103 pci_getconf_status status; /* request status */ 104 }; 105 106 struct pci_io { 107 struct pcisel sel; /* device to operate on */ 108 int reg; /* configuration register to examine */ 109 int width; /* width (in bytes) of read or write */ 110 u_int32_t data; /* data to write or result of read */ 111 }; 112 113 struct pci_bar_io { 114 struct pcisel sel; /* device to operate on */ 115 int reg; /* starting address of BAR */ 116 int pbi_enabled; /* decoding enabled */ 117 uint64_t base; /* current value of BAR */ 118 uint64_t length; /* length of BAR */ 119 }; 120 121 struct pci_vpd_element { 122 char keyword[2]; 123 uint8_t flags; 124 uint8_t datalen; 125 uint8_t data[0]; 126 }; 127 128 #define PVE_FLAG_IDENT 0x01 /* Element is the string identifier */ 129 #define PVE_FLAG_RW 0x02 /* Element is read/write */ 130 131 #define PVE_NEXT(pve) \ 132 ((struct pci_vpd_element *)((char *)(pve) + \ 133 sizeof(struct pci_vpd_element) + (pve)->datalen)) 134 135 struct pci_list_vpd_io { 136 struct pcisel plvi_sel; /* device to operate on */ 137 size_t plvi_len; /* size of the data area */ 138 struct pci_vpd_element *plvi_data; 139 }; 140 141 #define PCIOCGETCONF _IOWR('p', 5, struct pci_conf_io) 142 #define PCIOCREAD _IOWR('p', 2, struct pci_io) 143 #define PCIOCWRITE _IOWR('p', 3, struct pci_io) 144 #define PCIOCATTACHED _IOWR('p', 4, struct pci_io) 145 #define PCIOCGETBAR _IOWR('p', 6, struct pci_bar_io) 146 #define PCIOCLISTVPD _IOWR('p', 7, struct pci_list_vpd_io) 147 148 #endif /* !_PCIIO_H_ */ 149