| /devicemodel/arch/x86/ |
| A D | pm.c | 66 *eax = reset_control; in reset_handler()
68 reset_control = *eax; in reset_handler()
70 if (*eax & 0x8) { in reset_handler()
75 } else if (*eax & 0x4) { in reset_handler()
170 uint32_t *eax, void *arg) in pm1_status_handler() argument
177 *eax = pm1_status; in pm1_status_handler()
203 uint32_t *eax, void *arg) in pm1_enable_handler() argument
210 *eax = pm1_enable; in pm1_enable_handler()
261 *eax = pm1_control; in pm1_control_handler()
298 uint32_t *eax, void *arg) in smi_cmd_handler() argument
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| /devicemodel/hw/platform/ |
| A D | atkbdc.c | 204 uint32_t *eax, void *arg) in atkbdc_data_handler() argument
219 *eax = base->ctrlbyte & 0xff; in atkbdc_data_handler()
224 *eax = buf; in atkbdc_data_handler()
238 base->ram[0] = *eax; in atkbdc_data_handler()
245 base->outport = *eax; in atkbdc_data_handler()
306 *eax = base->status; in atkbdc_sts_ctl_handler()
315 switch (*eax) { in atkbdc_sts_ctl_handler()
336 base->curcmd = *eax; in atkbdc_sts_ctl_handler()
348 base->curcmd = *eax; in atkbdc_sts_ctl_handler()
368 if (*eax >= 0x21 && *eax <= 0x3f) { in atkbdc_sts_ctl_handler()
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| A D | cmos_io.c | 44 uint32_t *eax, void *arg) in cmos_io_handler() argument
55 __func__, port, in, bytes, (uint8_t)*eax, next_ops); in cmos_io_handler()
65 buf_offset = (uint8_t)(*eax); in cmos_io_handler()
76 *eax = cmos_buffer[buf_offset]; in cmos_io_handler()
83 cmos_buffer[buf_offset] = (uint8_t)*eax; in cmos_io_handler()
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| A D | rtc.c | 898 int bytes, uint32_t *eax, void *arg) in vrtc_addr_handler() argument
906 *eax = 0xff; in vrtc_addr_handler()
911 vrtc->addr = *eax & 0x7f; in vrtc_addr_handler()
925 int bytes, uint32_t *eax, void *arg) in vrtc_data_handler() argument
966 *eax = vrtc->rtcdev.reg_c; in vrtc_data_handler()
969 *eax = *((uint8_t *)rtc + offset); in vrtc_data_handler()
975 RTC_DEBUG("RTC reg_a set to %#x\n", *eax); in vrtc_data_handler()
976 vrtc_set_reg_a(vrtc, *eax); in vrtc_data_handler()
980 error = vrtc_set_reg_b(vrtc, *eax); in vrtc_data_handler()
992 *eax &= 0x7f; in vrtc_data_handler()
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| A D | pit.c | 515 uint32_t *eax, void *arg) in vpit_handler() argument
527 val = *eax; in vpit_handler()
557 *eax = c->status; in vpit_handler()
576 *eax = tmp; in vpit_handler()
579 *eax = c->ol[--c->olbyte]; in vpit_handler()
588 c->cr[c->crbyte++] = *eax; in vpit_handler()
628 uint32_t *eax, void *arg) in vpit_nmisc_handler() argument
641 *eax = TMR2_OUT_STS; in vpit_nmisc_handler()
643 *eax = 0; in vpit_nmisc_handler()
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| A D | debugexit.c | 41 uint32_t *eax, void *arg) in debugexit_handler() argument
44 *eax = 0xFFFF; in debugexit_handler()
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| /devicemodel/core/ |
| A D | post.c | 34 uint32_t *eax, void *arg) in post_data_handler() argument
39 *eax = 0xff; /* return some garbage */ in post_data_handler()
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| A D | inout.c | 50 uint32_t *eax, void *arg) in default_inout() argument
55 *eax = 0xffffffff; in default_inout()
58 *eax = 0xffff; in default_inout()
61 *eax = 0xff; in default_inout()
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| /devicemodel/hw/pci/ |
| A D | lpc.c | 154 uint32_t *eax, void *arg) in lpc_uart_io_handler() argument
164 *eax = uart_read(lpc_uart->uart, offset); in lpc_uart_io_handler()
166 uart_write(lpc_uart->uart, offset, *eax); in lpc_uart_io_handler()
170 *eax = uart_read(lpc_uart->uart, offset); in lpc_uart_io_handler()
171 *eax |= uart_read(lpc_uart->uart, offset + 1) << 8; in lpc_uart_io_handler()
173 uart_write(lpc_uart->uart, offset, *eax); in lpc_uart_io_handler()
174 uart_write(lpc_uart->uart, offset + 1, *eax >> 8); in lpc_uart_io_handler()
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| A D | core.c | 498 uint32_t *eax, void *arg) in pci_emul_io_handler() argument
513 *eax = bar_value(bytes, *eax); in pci_emul_io_handler()
2402 *eax = 0xffffffff; in pci_cfgrw()
2419 *eax = 0xffffffff; in pci_cfgrw()
2428 *eax = 0x00000000; in pci_cfgrw()
2441 eax); in pci_cfgrw()
2447 *eax = CFGREAD(dev, coff, bytes); in pci_cfgrw()
2454 coff, bytes, *eax) == 0) in pci_cfgrw()
2503 addr = *eax & mask; in pci_cfgrw()
2516 addr = bar = *eax & mask; in pci_cfgrw()
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| /devicemodel/include/ |
| A D | rtc.h | 52 int bytes, uint32_t *eax, void *arg);
54 int bytes, uint32_t *eax, void *arg);
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| A D | inout.h | 40 int bytes, uint32_t *eax, void *arg);
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| A D | types.h | 142 do_cpuid(uint32_t leaf, uint32_t subleaf, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *ed… in do_cpuid() argument
145 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) in do_cpuid()
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| /devicemodel/hw/ |
| A D | vga.c | 1237 uint32_t *eax, void *arg) in vga_port_handler() argument
1245 *eax &= ~0xff; in vga_port_handler()
1249 *eax |= val & 0xff; in vga_port_handler()
1252 val = *eax & 0xff; in vga_port_handler()
1259 *eax &= ~0xffff; in vga_port_handler()
1263 *eax |= val & 0xff; in vga_port_handler()
1268 *eax |= (val & 0xff) << 8; in vga_port_handler()
1271 val = *eax & 0xff; in vga_port_handler()
1274 val = (*eax >> 8) & 0xff; in vga_port_handler()
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| /devicemodel/hw/platform/vssram/ |
| A D | vssram.c | 504 uint32_t subleaf, eax, ebx, ecx, edx; in get_cache_hierarchy_info() local
512 do_cpuid(0x4, subleaf, &eax, &ebx, &ecx, &edx); in get_cache_hierarchy_info()
514 cache_type = eax & 0x1f; in get_cache_hierarchy_info()
515 cache_level = (eax >> 5) & 0x7; in get_cache_hierarchy_info()
516 id = (eax >> 14) & 0xfff; in get_cache_hierarchy_info()
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