1 /* 2 * Copyright (C) 2018-2022 Intel Corporation. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Given the reality that some of ACPI configrations are unlikey changed, 8 * define these MACROs in this header file. 9 * The platform_acpi_info.h still has chance to override the default 10 * definition by #undef with offline tool. 11 */ 12 #ifndef DEFAULT_ACPI_INFO_H 13 #define DEFAULT_ACPI_INFO_H 14 15 /* APIC */ 16 #define LAPIC_BASE 0xFEE00000UL 17 18 #define IOAPIC0_BASE 0xFEC00000UL 19 #define IOAPIC1_BASE 0UL 20 21 /* pm sstate data */ 22 #define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO 23 #define PM1A_EVT_BIT_WIDTH 0x20U 24 #define PM1A_EVT_BIT_OFFSET 0U 25 26 #define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO 27 #define PM1B_EVT_BIT_WIDTH 0U 28 #define PM1B_EVT_BIT_OFFSET 0U 29 #define PM1B_EVT_ACCESS_SIZE 0U 30 #define PM1B_EVT_ADDRESS 0UL 31 32 #define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO 33 #define PM1A_CNT_BIT_WIDTH 0x10U 34 #define PM1A_CNT_BIT_OFFSET 0U 35 #define PM1A_CNT_ACCESS_SIZE 2U 36 37 #define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO 38 #define PM1B_CNT_BIT_WIDTH 0U 39 #define PM1B_CNT_BIT_OFFSET 0U 40 #define PM1B_CNT_ACCESS_SIZE 0U 41 #define PM1B_CNT_ADDRESS 0UL 42 43 #define S3_PKG_VAL_PM1A 0x05U 44 #define S3_PKG_VAL_PM1B 0U 45 #define S3_PKG_RESERVED 0U 46 47 #define S5_PKG_VAL_PM1A 0x07U 48 #define S5_PKG_VAL_PM1B 0U 49 #define S5_PKG_RESERVED 0U 50 51 /* reset register */ 52 #define RESET_REGISTER_BIT_WIDTH 0x08U 53 #define RESET_REGISTER_BIT_OFFSET 0U 54 #define RESET_REGISTER_ACCESS_SIZE 0x01U 55 56 #endif /* DEFAULT_ACPI_INFO_H */ 57