1 /*
2  * Copyright (C) 2020-2022 Intel Corporation.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef RTCT_H
8 #define RTCT_H
9 
10 #include <acpi.h>
11 #include <ptdev.h>
12 
13 #include "misc_cfg.h"
14 
15 #define RTCT_ENTRY_TYPE_RTCD_LIMIT		1U
16 #define RTCT_ENTRY_TYPE_RTCM_BINARY		2U
17 #define RTCT_ENTRY_TYPE_WRC_L3_MASKS		3U
18 #define RTCT_ENTRY_TYPE_GT_L3_MASKS		4U
19 #define RTCT_ENTRY_TYPE_SOFTWARE_SRAM		5U
20 #define RTCT_ENTRY_TYPE_STREAM_DATAPATH		6U
21 #define RTCT_ENTRY_TYPE_TIMEAWARE_SUBSYS	7U
22 #define RTCT_ENTRY_TYPE_RT_IOMMU		8U
23 #define RTCT_ENTRY_TYPE_MEM_HIERARCHY_LATENCY	9U
24 
25 #define	RTCT_V2_COMPATIBILITY	0U
26 #define	RTCT_V2_RTCD_LIMIT	1U
27 #define	RTCT_V2_CRL_BINARY	2U
28 #define	RTCT_V2_IA_WAYMASK	3U
29 #define	RTCT_V2_WRC_WAYMASK	4U
30 #define	RTCT_V2_GT_WAYMASK	5U
31 #define	RTCT_V2_SSRAM_WAYMASK	6U
32 #define	RTCT_V2_SSRAM	7U
33 #define	RTCT_V2_MEMORY_HIERARCHY_LATENCY	8U
34 #define	RTCT_V2_ERROR_LOG_ADDRESS	9U
35 
36 /*
37  * PRE_RTVM_SW_SRAM_MAX_SIZE is for Prelaunch VM only and
38  * is generated by config tool on platform that Software SRAM is configured.
39  *
40  * For cases that Software SRAM is not configured, PRE_RTVM_SW_SRAM_MAX_SIZE is defined as 0
41  */
42 #define PRE_RTVM_SW_SRAM_BASE_GPA (GPU_OPREGION_GPA - PRE_RTVM_SW_SRAM_MAX_SIZE)
43 
44 struct rtct_entry {
45 	 uint16_t size;
46 	 uint16_t format;
47 	 uint32_t type;
48 	 uint32_t data[64];
49 } __packed;
50 
51 struct rtct_entry_data_compatibility {
52 	uint32_t rtct_ver_major;
53 	uint32_t rtct_ver_minor;
54 	uint32_t rtcd_ver_major;
55 	uint32_t rtcd_ver_minor;
56 } __packed;
57 
58 struct rtct_entry_data_rtcm_binary
59 {
60 	uint64_t address;
61 	uint32_t size;
62 } __packed;
63 
64 struct rtct_entry_data_ssram
65 {
66 	uint32_t cache_level;
67 	uint64_t base;
68 	uint32_t ways;
69 	uint32_t size;
70 	uint32_t apic_id_0; /*only the first core is responsible for initialization of L3 mem region*/
71 } __packed;
72 
73 struct rtct_entry_data_ssram_v2 {
74 	uint32_t cache_level;
75 	uint32_t cache_id;
76 	uint64_t base;
77 	uint32_t size;
78 	uint32_t shared;
79 } __packed;
80 
81 uint64_t get_software_sram_base(void);
82 uint64_t get_software_sram_size(void);
83 #endif /* RTCT_H */
84