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Searched refs:addr (Results 1 – 25 of 58) sorted by relevance

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/hypervisor/include/arch/x86/asm/
A Dio.h63 pio_write8((uint8_t)v, addr); in pio_write()
65 pio_write16((uint16_t)v, addr); in pio_write()
67 pio_write32(v, addr); in pio_write()
75 ret = pio_read8(addr); in pio_read()
77 ret = pio_read16(addr); in pio_read()
79 ret = pio_read32(addr); in pio_read()
177 val = (uint64_t)mmio_read8(addr); in mmio_read()
180 val = (uint64_t)mmio_read16(addr); in mmio_read()
186 val = mmio_read64(addr); in mmio_read()
196 mmio_write8((uint8_t)val, addr); in mmio_write()
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A Dmmu.h103 static inline uint64_t round_page_up(uint64_t addr) in round_page_up() argument
105 return (((addr + (uint64_t)PAGE_SIZE) - 1UL) & PAGE_MASK); in round_page_up()
108 static inline uint64_t round_page_down(uint64_t addr) in round_page_down() argument
110 return (addr & PAGE_MASK); in round_page_down()
181 void flush_tlb(uint64_t addr);
182 void flush_tlb_range(uint64_t addr, uint64_t size);
A Dpgtable.h392 static inline uint64_t *pml4e_offset(uint64_t *pml4_page, uint64_t addr) in pml4e_offset() argument
394 return pml4_page + pml4e_index(addr); in pml4e_offset()
417 static inline uint64_t *pdpte_offset(const uint64_t *pml4e, uint64_t addr) in pdpte_offset() argument
419 return pml4e_page_vaddr(*pml4e) + pdpte_index(addr); in pdpte_offset()
442 static inline uint64_t *pde_offset(const uint64_t *pdpte, uint64_t addr) in pde_offset() argument
444 return pdpte_page_vaddr(*pdpte) + pde_index(addr); in pde_offset()
467 static inline uint64_t *pte_offset(const uint64_t *pde, uint64_t addr) in pte_offset() argument
469 return pde_page_vaddr(*pde) + pte_index(addr); in pte_offset()
547 const uint64_t *pgtable_lookup_entry(uint64_t *pml4_page, uint64_t addr,
/hypervisor/include/arch/x86/asm/lib/
A Dbits.h140 if (addr[idx] != ~0UL) { in ffz64_ex()
141 ret = (idx << 6U) + ffz64(addr[idx]); in ffz64_ex()
186 static inline void name(uint16_t nr_arg, volatile op_type *addr) \
191 : "+m" (*addr) \
206 static inline void name(uint16_t nr_arg, volatile op_type *addr) \
211 : "+m" (*addr) \
230 : "m" (*addr), "r" ((uint64_t)(nr & 0x3fU)) in bitmap_test()
240 : "m" (*addr), "r" ((uint32_t)(nr & 0x1fU)) in bitmap32_test()
253 static inline bool name(uint16_t nr_arg, volatile op_type *addr) \
259 : "=r" (ret), "=m" (*addr) \
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/hypervisor/arch/x86/
A Dioapic.c268 void *addr; in ioapic_get_rte() local
270 addr = gsi_to_ioapic_base(irq); in ioapic_get_rte()
279 void *addr; in ioapic_set_rte() local
332 void *addr = NULL; in ioapic_irq_gsi_mask_unmask() local
339 if (addr != NULL) { in ioapic_irq_gsi_mask_unmask()
395 void *addr; in init_ioapic_id_info() local
408 addr = map_ioapic(ioapic_array[ioapic_id].addr); in init_ioapic_id_info()
452 void *addr; in ioapic_setup_irqs() local
455 addr = map_ioapic(ioapic_array[ioapic_id].addr); in ioapic_setup_irqs()
502 void *addr; in suspend_ioapic() local
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A Dvmx.c20 static inline void exec_vmxon(void *addr) in exec_vmxon() argument
29 : "a"(addr) in exec_vmxon()
81 void exec_vmclear(void *addr) in exec_vmclear() argument
91 : "a"(addr) in exec_vmclear()
99 void exec_vmptrld(void *addr) in exec_vmptrld() argument
108 : "a"(addr) in exec_vmptrld()
/hypervisor/boot/
A Dacpi_base.c75 uint16_t *addr; in init_acpi() local
78 addr = (uint16_t *)hpa2hva(0x40eUL); in init_acpi()
80 rsdp = found_rsdp((char *)hpa2hva((uint64_t)(*addr) << 4U), 0x400UL); in init_acpi()
131 uint64_t addr = 0UL; in get_acpi_tbl() local
150 addr = xsdt->table_offset_entry[i]; in get_acpi_tbl()
161 addr = rsdt->table_offset_entry[i]; in get_acpi_tbl()
167 return hpa2hva(addr); in get_acpi_tbl()
237 ioapic_id_array[ioapic_idx].addr = ioapic->addr; in parse_madt_ioapic()
251 uint64_t addr = 0UL; in parse_hpet() local
254 addr = hpet->address.address; in parse_hpet()
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A Dreloc.c39 uint64_t addr; in get_hv_image_delta() local
45 : "=m" (addr) in get_hv_image_delta()
49 return addr; in get_hv_image_delta()
73 uint64_t *addr; in relocate() local
108 addr = (uint64_t *)(delta + entry->r_offset); in relocate()
122 *addr += delta; in relocate()
/hypervisor/dm/
A Dvrtc.c419 static uint8_t cmos_read(uint8_t addr) in cmos_read() argument
421 pio_write8(addr, CMOS_ADDR_PORT); in cmos_read()
427 pio_write8(addr, CMOS_ADDR_PORT); in cmos_write()
448 reg = cmos_read(addr); in cmos_get_reg_val()
465 cmos_write(addr, value); in cmos_set_reg_val()
544 offset = vrtc->addr; in vrtc_read()
546 if (addr == CMOS_ADDR_PORT) { in vrtc_read()
624 vrtc->addr = (uint8_t)(value & 0x7FU); in vrtc_write()
627 if (vrtc_is_time_register(vrtc->addr)) { in vrtc_write()
636 switch (vrtc->addr) { in vrtc_write()
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A Dvpic.c814 addr, width); in vpic_primary_io_read()
829 if (vpic_primary_handler(vm_pic(vcpu->vm), false, addr, width, &val) < 0) { in vpic_primary_io_write()
831 __func__, addr, width, val); in vpic_primary_io_write()
866 addr, width); in vpic_secondary_io_read()
880 if (vpic_secondary_handler(vm_pic(vcpu->vm), false, addr, width, &val) < 0) { in vpic_secondary_io_write()
882 __func__, addr, width, val); in vpic_secondary_io_write()
938 static bool vpic_elc_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t width) in vpic_elc_io_read() argument
942 if (vpic_elc_handler(vm_pic(vcpu->vm), true, addr, width, &pio_req->value) < 0) { in vpic_elc_io_read()
943 pr_err("pic elc read port 0x%x width=%d failed", addr, width); in vpic_elc_io_read()
958 if (vpic_elc_handler(vm_pic(vcpu->vm), false, addr, width, &val) < 0) { in vpic_elc_io_write()
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A Dio_req.c81 if ((info->addr == async_info->addr) && in asyncio_is_conflict()
100 if (async_info->addr != 0UL) { in add_asyncio()
136 if (async_info->addr != 0UL) { in remove_asyncio()
142 && (info->addr == async_info->addr) in remove_asyncio()
154 pr_fatal("Failed to find asyncio req on addr: %lx!", async_info->addr); in remove_asyncio()
169 uint64_t addr = 0UL; in get_asyncio_desc() local
183 addr = io_req->reqs.pio_request.address; in get_asyncio_desc()
189 addr = io_req->reqs.mmio_request.address; in get_asyncio_desc()
197 if (addr != 0UL) { in get_asyncio_desc()
202 if ((iter_info->addr == addr) && (iter_info->type == type) && in get_asyncio_desc()
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A Dvioapic.c209 vioapic_indirect_read(struct acrn_single_vioapic *vioapic, uint32_t addr) in vioapic_indirect_read() argument
214 regnum = addr & 0xffU; in vioapic_indirect_read()
289 static void vioapic_indirect_write(struct acrn_single_vioapic *vioapic, uint32_t addr, uint32_t dat… in vioapic_indirect_write() argument
295 regnum = addr & 0xffUL; in vioapic_indirect_write()
398 offset = (uint32_t)(gpa - vioapic->chipinfo.addr); in vioapic_mmio_rw()
525 .addr = VIOAPIC_BASE in vioapic_init()
547 register_mmio_emulation_handler(vm, vioapic_mmio_access_handler, (uint64_t)vioapic->chipinfo.addr, in vioapic_init()
548 (uint64_t)vioapic->chipinfo.addr + VIOAPIC_SIZE, (void *)vioapic, false); in vioapic_init()
549 …ept_del_mr(vm, (uint64_t *)vm->arch_vm.nworld_eptp, (uint64_t)vioapic->chipinfo.addr, VIOAPIC_SIZE… in vioapic_init()
/hypervisor/arch/x86/seed/
A Dseed.c27 uint64_t addr; member
56 seed_arg[i].addr = strtoul_hex(arg); in parse_seed_arg()
99 if (seed_arg[i].addr != 0UL) { in fill_seed_arg()
101 snprintf(cmd_dst, cmd_sz, "%s0x%X ", seed_arg[i].str, service_vm_hpa2gpa(seed_arg[i].addr)); in fill_seed_arg()
105 (struct image_boot_params *)hpa2hva(seed_arg[i].addr); in fill_seed_arg()
229 status = parse_seed_sbl(seed_arg[index].addr, &g_phy_seed); in init_seed()
232 status = parse_seed_abl(seed_arg[index].addr, &g_phy_seed); in init_seed()
/hypervisor/include/debug/
A Dprofiling_internal.h302 int32_t profiling_get_version_info(struct acrn_vm *vm, uint64_t addr);
303 int32_t profiling_get_pcpu_id(struct acrn_vm *vm, uint64_t addr);
304 int32_t profiling_msr_ops_all_cpus(struct acrn_vm *vm, uint64_t addr);
305 int32_t profiling_vm_list_info(struct acrn_vm *vm, uint64_t addr);
306 int32_t profiling_get_control(struct acrn_vm *vm, uint64_t addr);
307 int32_t profiling_set_control(struct acrn_vm *vm, uint64_t addr);
308 int32_t profiling_configure_pmi(struct acrn_vm *vm, uint64_t addr);
309 int32_t profiling_configure_vmsw(struct acrn_vm *vm, uint64_t addr);
311 int32_t profiling_get_status_info(struct acrn_vm *vm, uint64_t addr);
/hypervisor/arch/x86/guest/
A Dpm.c144 static bool pm1ab_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t width) in pm1ab_io_read() argument
148 pio_req->value = pio_read(addr, width); in pm1ab_io_read()
196 static bool pm1ab_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t width, uint32_t v) in pm1ab_io_write() argument
206 if ((addr == vm->pm.sx_state_data->pm1a_cnt.address) && is_s3_enabled(v)) { in pm1ab_io_write()
221 } else if ((addr == vm->pm.sx_state_data->pm1b_cnt.address) && is_s3_enabled(v)) { in pm1ab_io_write()
246 pio_write(v, addr, width); in pm1ab_io_write()
277 __unused uint16_t addr, __unused size_t width) in rt_vm_pm1a_io_read() argument
290 static bool rt_vm_pm1a_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t width, uint32_t v) in rt_vm_pm1a_io_write() argument
293 pr_dbg("Invalid address (0x%x) or width (0x%x)", addr, width); in rt_vm_pm1a_io_write()
328 static bool prelaunched_vm_sleep_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t width, uint… in prelaunched_vm_sleep_io_write() argument
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A Dvm_reset.c72 static bool handle_reset_reg_read(struct acrn_vcpu *vcpu, __unused uint16_t addr, in handle_reset_reg_read() argument
135 static bool handle_kb_write(struct acrn_vcpu *vcpu, __unused uint16_t addr, size_t bytes, uint32_t … in handle_kb_write() argument
141 static bool handle_kb_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes) in handle_kb_read() argument
145 vcpu->req.reqs.pio_request.value = pio_read8(addr); in handle_kb_read()
166 static bool handle_cf9_write(struct acrn_vcpu *vcpu, __unused uint16_t addr, size_t bytes, uint32_t… in handle_cf9_write() argument
180 static bool handle_reset_reg_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t va… in handle_reset_reg_write() argument
195 pio_write8((uint8_t)val, addr); in handle_reset_reg_write()
A Dassign.c122 dest = entry->vmsi.addr.bits.dest_field; in ptirq_build_physical_msi()
155 entry->pmsi.addr.full = 0UL; in ptirq_build_physical_msi()
164 entry->pmsi.addr.ir_bits.shv = 0U; in ptirq_build_physical_msi()
165 entry->pmsi.addr.ir_bits.intr_format = 0x1U; in ptirq_build_physical_msi()
167 entry->pmsi.addr.ir_bits.constant = 0xFEEU; in ptirq_build_physical_msi()
177 entry->pmsi.addr = entry->vmsi.addr; in ptirq_build_physical_msi()
178 entry->pmsi.addr.bits.dest_field = dest_mask; in ptirq_build_physical_msi()
179 entry->pmsi.addr.bits.rh = MSI_ADDR_RH; in ptirq_build_physical_msi()
184 entry->vmsi.addr.full, entry->vmsi.data.full, in ptirq_build_physical_msi()
185 entry->pmsi.addr.full, entry->pmsi.data.full); in ptirq_build_physical_msi()
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A Dguest_memory.c63 uint64_t addr; in local_gva2gpa_common() local
72 addr = pw_info->top_entry; in local_gva2gpa_common()
79 addr = addr & IA32E_REF_MASK; in local_gva2gpa_common()
80 base = gpa2hva(vcpu->vm, addr); in local_gva2gpa_common()
134 addr = entry; in local_gva2gpa_common()
176 uint64_t addr; in local_gva2gpa_pae() local
179 addr = get_pae_pdpt_addr(pw_info->top_entry); in local_gva2gpa_pae()
180 base = (uint64_t *)gpa2hva(vcpu->vm, addr); in local_gva2gpa_pae()
/hypervisor/debug/
A Duart16550.c127 static void early_pgtable_map_uart(uint64_t addr) in early_pgtable_map_uart() argument
135 pml4e = pml4e_offset((uint64_t *)value, addr); in early_pgtable_map_uart()
140 pdpte = pdpte_offset(pml4e, addr); in early_pgtable_map_uart()
143 pde = pde_offset(pdpte, addr); in early_pgtable_map_uart()
144 *pde = (addr & PDE_MASK) + (PAGE_PRESENT|PAGE_RW|PAGE_PSE); in early_pgtable_map_uart()
146 pde = pde_offset(pdpte, addr); in early_pgtable_map_uart()
148 *pde = (addr & PDE_MASK) + (PAGE_PRESENT|PAGE_RW|PAGE_PSE); in early_pgtable_map_uart()
189 uint64_t addr = (bar0 & PCI_BASE_ADDRESS_MEM_MASK)|(((uint64_t)bar_hi) << 32U); in uart16550_init() local
191 early_pgtable_map_uart(addr); in uart16550_init()
193 uart.mmio_base_vaddr = hpa2hva_early(addr); in uart16550_init()
A Dnpk_log.c52 static inline int32_t npk_write(const char *value, void *addr, size_t sz) in npk_write() argument
57 mmio_write64(*(uint64_t *)value, addr); in npk_write()
60 mmio_write32(*(uint32_t *)value, addr); in npk_write()
63 mmio_write16(*(uint16_t *)value, addr); in npk_write()
66 mmio_write8(*(uint8_t *)value, addr); in npk_write()
A Dprofiling.c825 if (copy_to_gpa(vm, &msr_list, addr, sizeof(msr_list)) != 0) { in profiling_msr_ops_all_cpus()
836 int32_t profiling_vm_list_info(struct acrn_vm *vm, uint64_t addr) in profiling_vm_list_info() argument
903 if (copy_from_gpa(vm, &ver_info, addr, sizeof(ver_info)) != 0) { in profiling_get_version_info()
915 if (copy_to_gpa(vm, &ver_info, addr, sizeof(ver_info)) != 0) { in profiling_get_version_info()
927 int32_t profiling_get_control(struct acrn_vm *vm, uint64_t addr) in profiling_get_control() argument
961 int32_t profiling_set_control(struct acrn_vm *vm, uint64_t addr) in profiling_set_control() argument
1072 int32_t profiling_configure_pmi(struct acrn_vm *vm, uint64_t addr) in profiling_configure_pmi() argument
1135 if (copy_to_gpa(vm, &pmi_config, addr, sizeof(pmi_config)) != 0) { in profiling_configure_pmi()
1207 int32_t profiling_get_pcpu_id(struct acrn_vm *vm, uint64_t addr) in profiling_get_pcpu_id() argument
1213 if (copy_from_gpa(vm, &pcpuid, addr, sizeof(pcpuid)) != 0) { in profiling_get_pcpu_id()
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/hypervisor/dm/vpci/
A Dvmsix_on_msi.c176 info.addr.full = vdev->msix.table_entries[index].addr; in remap_one_vmsix_entry_on_msi()
184 info.addr.ir_bits.shv = 1U; in remap_one_vmsix_entry_on_msi()
185 info.addr.ir_bits.intr_index_high = ir_index.bits.index_high; in remap_one_vmsix_entry_on_msi()
186 info.addr.ir_bits.intr_index_low = ir_index.bits.index_low; in remap_one_vmsix_entry_on_msi()
187 pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_ADDR, 0x4U, (uint32_t)info.addr.full); in remap_one_vmsix_entry_on_msi()
190 (uint32_t)(info.addr.full >> 32U)); in remap_one_vmsix_entry_on_msi()
A Divshmem.c108 uint64_t addr; in init_ivshmem_shared_memory() local
110 addr = e820_alloc_memory(roundup(IVSHMEM_SHM_SIZE, PDE_SIZE), MEM_SIZE_MAX); in init_ivshmem_shared_memory()
112 mem_regions[i].hpa = addr; in init_ivshmem_shared_memory()
113 addr += mem_regions[i].size; in init_ivshmem_shared_memory()
186 vlapic_inject_msi(dest_vm, entry->addr, entry->data); in ivshmem_server_notify_peer()
473 uint64_t addr, mask, size = 0UL; in init_ivshmem_bar() local
476 addr = dev_config->vbar_base[bar_idx]; in init_ivshmem_bar()
478 vbar->bar_type.bits = addr; in init_ivshmem_bar()
499 pci_vdev_write_vbar(vdev, bar_idx, (uint32_t)addr); in init_ivshmem_bar()
504 pci_vdev_write_vbar(vdev, (bar_idx + 1U), ((uint32_t)(addr >> 32U))); in init_ivshmem_bar()
/hypervisor/include/arch/x86/asm/guest/
A Dvept.h20 #define PAGING_ENTRY_OFFSET(addr, lvl) (((addr) >> PAGING_ENTRY_SHIFT(lvl)) & (PTRS_PER_PTE - 1UL)) argument
/hypervisor/hw/
A Dpci.c92 uint32_t addr = (uint32_t)bdf.value; in pio_off_to_address() local
94 addr <<= 8U; in pio_off_to_address()
95 addr |= (offset | PCI_CFG_ENABLE); in pio_off_to_address()
96 return addr; in pio_off_to_address()
101 uint32_t addr; in pci_pio_read_cfg() local
104 addr = pio_off_to_address(bdf, offset); in pci_pio_read_cfg()
107 pio_write32(addr, (uint16_t)PCI_CONFIG_ADDR); in pci_pio_read_cfg()
127 uint32_t addr = pio_off_to_address(bdf, offset); in pci_pio_write_cfg() local
130 pio_write32(addr, (uint16_t)PCI_CONFIG_ADDR); in pci_pio_write_cfg()
181 void *hva = hpa2hva(addr); in pci_mmcfg_read_cfg()
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