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Searched refs:cache (Results 1 – 3 of 3) sorted by relevance

/hypervisor/include/arch/x86/asm/
A Drdt.h33 } cache; member
/hypervisor/arch/x86/
A Drdt.c53 if (res != RDT_RESID_MBA && ins->res.cache.is_cdp_enabled) { in setup_res_clos_msr()
/hypervisor/lib/crypto/mbedtls/
A DChangeLog28 plaintext of messages under some conditions by using a cache attack
39 previous entry) by using a cache attack targeting the SSL input record
704 against side-channel attacks like the cache attack described in
1325 * Add countermeasure against "Lucky 13 strikes back" cache-based attack,
1924 * Add countermeasure against "Lucky 13 strikes back" cache-based attack,
2162 * The SSL session cache module (ssl_cache) now also retains peer_cert
2251 * Added simple SSL session cache implementation

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