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Searched refs:capoff (Results 1 – 10 of 10) sorted by relevance

/hypervisor/dm/vpci/
A Dvmsi.c44 uint32_t capoff = vdev->msi.capoff; in enable_disable_msi() local
45 uint32_t msgctrl = pci_pdev_read_cfg(pbdf, capoff + PCIR_MSI_CTRL, 2U); in enable_disable_msi()
52 pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_CTRL, 2U, msgctrl); in enable_disable_msi()
67 uint32_t capoff = vdev->msi.capoff; in remap_vmsi() local
71 vmsi_addrlo = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_ADDR), 4U); in remap_vmsi()
73 vmsi_addrhi = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_ADDR_HIGH), 4U); in remap_vmsi()
76 vmsi_msgdata = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_DATA), 2U); in remap_vmsi()
84 pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_ADDR_HIGH, 0x4U, in remap_vmsi()
143 vdev->msi.capoff = pdev->msi_capoff; in init_vmsi()
146 val = pci_pdev_read_cfg(pdev->bdf, vdev->msi.capoff, 4U); in init_vmsi()
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A Dvmsix_on_msi.c34 if ((pdev->msi_capoff != 0U) && (pdev->msix.capoff == 0U)) { in need_vmsix_on_msi_emulation()
67 return vdev->msi.is_64bit ? (vdev->msix.capoff + 0x10U) : (vdev->msix.capoff + 0xCU); in get_mask_bits_offset()
91 vdev->msix.capoff = pdev->msi_capoff; in init_vmsix_on_msi()
92 vdev->msi.capoff = 0U; in init_vmsix_on_msi()
101 pci_vdev_write_vcfg(vdev, vdev->msix.capoff, 1U, 0x11U); in init_vmsix_on_msi()
105 pci_vdev_write_vcfg(vdev, vdev->msix.capoff + 4U, 4U, i); in init_vmsix_on_msi()
107 pci_vdev_write_vcfg(vdev, vdev->msix.capoff + 8U, 4U, 2048U + i); in init_vmsix_on_msi()
168 uint32_t capoff = vdev->msix.capoff; in remap_one_vmsix_entry_on_msi() local
189 pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_ADDR_HIGH, 0x4U, in remap_one_vmsix_entry_on_msi()
191 pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_DATA_64BIT, 0x2U, in remap_one_vmsix_entry_on_msi()
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A Dvpci_priv.h64 return (vdev->msix.capoff != 0U); in has_msix_cap()
72 return (has_msix_cap(vdev) && in_range(offset, vdev->msix.capoff, vdev->msix.caplen)); in msixcap_access()
88 return (vdev->sriov.capoff != 0U); in has_sriov_cap()
96 return (has_sriov_cap(vdev) && in_range(offset, vdev->sriov.capoff, vdev->sriov.caplen)); in sriovcap_access()
120 return (vdev->msi.capoff != 0U); in has_msi_cap()
128 return (has_msi_cap(vdev) && in_range(offset, vdev->msi.capoff, vdev->msi.caplen)); in msicap_access()
A Dvmsix.c51 (void)memcpy_s((void *)&pt_mask, bytes, (void *)&msix_pt_mask[offset - vdev->msix.capoff], bytes); in read_vmsix_cap_reg()
54 ctrl = pci_pdev_read_cfg(vdev->pdev->bdf, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U); in read_vmsix_cap_reg()
81 (void)memcpy_s((void *)&ro_mask, bytes, (void *)&msix_ro_mask[offset - vdev->msix.capoff], bytes); in write_vmsix_cap_reg()
190 vdev->msix.capoff = vpci_add_capability(vdev, (uint8_t *)(&msixcap), sizeof(struct msixcap)); in add_vmsix_capability()
191 if (vdev->msix.capoff != 0U) { in add_vmsix_capability()
A Dvsriov.c60 return ((uint16_t)(pci_pdev_read_cfg(pf_vdev->bdf, pf_vdev->sriov.capoff + reg, 2U))); in read_sriov_reg()
113 pci_pdev_write_cfg(pf_vdev->bdf, pf_vdev->sriov.capoff + PCIR_SRIOV_CONTROL, 2U, control); in create_vf()
273 vdev->sriov.capoff = pdev->sriov.capoff; in init_vsriov()
300 reg = offset - vdev->sriov.capoff; in write_sriov_cap_reg()
347 return (vdev->sriov.capoff + PCIR_SRIOV_VF_BAR_OFF + (bar_idx << 2U)); in sriov_bar_offset()
A Dvpci.c953 uint8_t capoff, reallen; in vpci_add_capability() local
961 capoff = CAP_START_OFFSET; in vpci_add_capability()
963 capoff = vdev->free_capoff; in vpci_add_capability()
967 if (((uint16_t)capoff + reallen) <= PCI_CONFIG_SPACE_SIZE) { in vpci_add_capability()
970 pci_vdev_write_vcfg(vdev, PCIR_CAP_PTR, 1U, capoff); in vpci_add_capability()
973 pci_vdev_write_vcfg(vdev, vdev->prev_capoff + 1U, 1U, capoff); in vpci_add_capability()
980 pci_vdev_write_vcfg(vdev, capoff + 1U, 1U, 0U); in vpci_add_capability()
982 vdev->prev_capoff = capoff; in vpci_add_capability()
983 vdev->free_capoff = capoff + reallen; in vpci_add_capability()
984 ret = capoff; in vpci_add_capability()
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A Dpci_pt.c76 msgctrl = pci_vdev_read_vcfg(vdev, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U); in write_pt_vmsix_cap_reg()
81 pci_pdev_write_cfg(vdev->pdev->bdf, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U, msgctrl); in write_pt_vmsix_cap_reg()
526 vdev->msix.capoff = pdev->msix.capoff; in init_vmsix_pt()
533 (void)memcpy_s((void *)&vdev->cfgdata.data_8[pdev->msix.capoff], pdev->msix.caplen, in init_vmsix_pt()
559 hdr = pci_pdev_read_cfg(vdev->pdev->bdf, vdev->pdev->sriov.capoff, 4U); in vdev_pt_hide_sriov_cap()
641 (vdev->phyfun->sriov.capoff + PCIR_SRIOV_VF_DEV_ID), 2U); in init_vdev_pt()
/hypervisor/include/dm/
A Dvpci.h59 uint32_t capoff; member
77 uint32_t capoff; member
88 uint32_t capoff; member
/hypervisor/hw/
A Dpci.c598 if (pdev->sriov.capoff != 0U) { in init_all_dev_config()
600 pdev->sriov.capoff + PCIR_SRIOV_TOTAL_VFS, 2U); in init_all_dev_config()
717 pdev->sriov.capoff = pos; in pci_enumerate_ext_cap()
790 pdev->msix.capoff = pos; in pci_enumerate_cap()
794 msgctrl = pci_pdev_read_cfg(pdev->bdf, pdev->msix.capoff + PCIR_MSIX_CTRL, 2U); in pci_enumerate_cap()
797 table_info = pci_pdev_read_cfg(pdev->bdf, pdev->msix.capoff + PCIR_MSIX_TABLE, 4U); in pci_enumerate_cap()
/hypervisor/include/hw/
A Dpci.h259 uint32_t capoff; member
268 uint32_t capoff; member

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