Searched refs:ctrl (Results 1 – 4 of 4) sorted by relevance
| /hypervisor/arch/x86/guest/ |
| A D | vmcs.c | 221 uint32_t ctrl = ctrl_req; in check_vmx_ctrl() local
232 ctrl &= vmx_msr_high; in check_vmx_ctrl()
233 ctrl |= vmx_msr_low; in check_vmx_ctrl()
235 if ((ctrl_req & ~ctrl) != 0U) { in check_vmx_ctrl()
237 msr, ctrl, ctrl_req); in check_vmx_ctrl()
240 return ctrl; in check_vmx_ctrl()
247 uint32_t ctrl = ctrl_req; in check_vmx_ctrl_64() local
252 ctrl &= vmx_msr; in check_vmx_ctrl_64()
254 if ((ctrl_req & ~ctrl) != 0U) { in check_vmx_ctrl_64()
256 msr, ctrl, ctrl_req); in check_vmx_ctrl_64()
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| /hypervisor/dm/vpci/ |
| A D | vmsix.c | 48 uint32_t virt, phy = 0U, ctrl, pt_mask = 0U; in read_vmsix_cap_reg() local
54 ctrl = pci_pdev_read_cfg(vdev->pdev->bdf, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U); in read_vmsix_cap_reg()
55 if (((ctrl & PCIM_MSIXCTRL_TABLE_SIZE) + 1U) != vdev->msix.table_count) { in read_vmsix_cap_reg()
56 vdev->msix.table_count = (ctrl & PCIM_MSIXCTRL_TABLE_SIZE) + 1U; in read_vmsix_cap_reg()
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| /hypervisor/hw/ |
| A D | pci.c | 671 uint32_t ctrl = 0, cap; in pci_enable_ptm_root() local
676 ctrl = PCIM_PTM_CTRL_ENABLED | PCIM_PTM_CTRL_ROOT_SELECTED; in pci_enable_ptm_root()
678 pci_pdev_write_cfg(pdev->bdf, pos + PCIR_PTM_CTRL, 4, ctrl); in pci_enable_ptm_root()
680 ctrl = pci_pdev_read_cfg(pdev->bdf, pos + PCIR_PTM_CTRL, 4); in pci_enable_ptm_root()
684 pdev->bdf.bits.f, pos, (ctrl & PCIM_PTM_CTRL_ENABLED) != 0, in pci_enable_ptm_root()
685 (ctrl & PCIM_PTM_CTRL_ROOT_SELECTED) != 0, in pci_enable_ptm_root()
686 (ctrl & PCIM_PTM_GRANULARITY_MASK) >> 8); in pci_enable_ptm_root()
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| /hypervisor/arch/x86/ |
| A D | cpu_caps.c | 161 static bool is_ctrl_setting_allowed(uint64_t msr_val, uint32_t ctrl) in is_ctrl_setting_allowed() argument
168 return ((((uint32_t)(msr_val >> 32UL)) & ctrl) == ctrl); in is_ctrl_setting_allowed()
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