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Searched refs:dev_dbg (Results 1 – 20 of 20) sorted by relevance

/hypervisor/debug/
A Dprofiling.c82 dev_dbg(DBG_LEVEL_PROFILING, in profiling_initialize_pmi()
158 dev_dbg(DBG_LEVEL_PROFILING, in profiling_enable_pmu()
392 dev_dbg(DBG_LEVEL_PROFILING, in profiling_generate_data()
416 dev_dbg(DBG_LEVEL_PROFILING, in profiling_generate_data()
427 dev_dbg(DBG_LEVEL_PROFILING, in profiling_generate_data()
488 dev_dbg(DBG_LEVEL_PROFILING, in profiling_handle_msrops()
499 dev_dbg(DBG_LEVEL_PROFILING, in profiling_handle_msrops()
507 dev_dbg(DBG_LEVEL_PROFILING, in profiling_handle_msrops()
981 dev_dbg(DBG_LEVEL_PROFILING, in profiling_set_control()
1010 dev_dbg(DBG_LEVEL_PROFILING, in profiling_set_control()
[all …]
/hypervisor/dm/
A Dvpic.c159 dev_dbg(DBG_LEVEL_PIC, in vpic_notify_intr()
170 dev_dbg(DBG_LEVEL_PIC, in vpic_notify_intr()
183 dev_dbg(DBG_LEVEL_PIC, in vpic_notify_intr()
230 dev_dbg(DBG_LEVEL_PIC, in vpic_notify_intr()
253 dev_dbg(DBG_LEVEL_PIC, "vpic cascade mode required\n"); in vpic_icw1()
256 dev_dbg(DBG_LEVEL_PIC, "vpic icw4 required\n"); in vpic_icw1()
293 dev_dbg(DBG_LEVEL_PIC, in vpic_icw4()
305 dev_dbg(DBG_LEVEL_PIC, in vpic_icw4()
483 dev_dbg(DBG_LEVEL_PIC, "%s i8259 special mask mode %s\n", in vpic_ocw3()
521 dev_dbg(DBG_LEVEL_PIC, "pic pin%hhu: asserted\n", pin); in vpic_set_pinstate()
[all …]
A Dvioapic.c65 dev_dbg(DBG_LEVEL_VIOAPIC, "ioapic pin%hhu: masked", pin); in vioapic_generate_intr()
348 dev_dbg(DBG_LEVEL_VIOAPIC, "vpic wire mode -> IOAPIC"); in vioapic_indirect_write()
357 dev_dbg(DBG_LEVEL_VIOAPIC, "vpic wire mode -> INTR"); in vioapic_indirect_write()
364 dev_dbg(DBG_LEVEL_VIOAPIC, "ioapic pin%hhu: redir table entry %#lx", in vioapic_indirect_write()
384 dev_dbg(DBG_LEVEL_VIOAPIC, "ioapic pin%hhu: asserted at rtbl write", pin); in vioapic_indirect_write()
446 dev_dbg(DBG_LEVEL_VIOAPIC, "ioapic processing eoi for vector %u", vector); in vioapic_process_eoi()
473 dev_dbg(DBG_LEVEL_VIOAPIC, in vioapic_process_eoi()
A Dio_req.c25 dev_dbg(DBG_LEVEL_IOREQ, "[vcpu_id=%hu type=MMIO]", vcpu_id); in acrn_print_request()
26 dev_dbg(DBG_LEVEL_IOREQ, in acrn_print_request()
35 dev_dbg(DBG_LEVEL_IOREQ, "[vcpu_id=%hu type=PORTIO]", vcpu_id); in acrn_print_request()
36 dev_dbg(DBG_LEVEL_IOREQ, in acrn_print_request()
45 dev_dbg(DBG_LEVEL_IOREQ, "[vcpu_id=%hu type=%d] NOT support type", in acrn_print_request()
/hypervisor/arch/x86/guest/
A Dvlapic.c469 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_reset_tmr()
689 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_write_lvt()
699 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_write_lvt()
1086 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_process_init_sipi()
1106 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_process_init_sipi()
1167 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_write_icrlo()
1179 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_write_icrlo()
1184 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_write_icrlo()
1321 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_write_svr()
1734 dev_dbg(DBG_LEVEL_VLAPIC, in vlapic_receive_intr()
[all …]
A Dassign.c182 dev_dbg(DBG_LEVEL_IRQ, "MSI %s addr:data = 0x%lx:%x(V) -> 0x%lx:%x(P)", in ptirq_build_physical_msi()
284 dev_dbg(DBG_LEVEL_IRQ, "IOAPIC RTE %s = 0x%x:%x(V) -> 0x%x:%x(P)", in ptirq_build_physical_rte()
301 dev_dbg(DBG_LEVEL_IRQ, "IOAPIC RTE %s = 0x%x:%x(P) -> 0x%x:%x(P)", in ptirq_build_physical_rte()
418 dev_dbg(DBG_LEVEL_IRQ, "VM%d INTX add pin mapping vgsi%d:pgsi%d", in add_intx_remapping()
454 dev_dbg(DBG_LEVEL_IRQ, in remove_intx_remapping()
458 dev_dbg(DBG_LEVEL_IRQ, "from vm%d vgsi=%d\n", in remove_intx_remapping()
497 dev_dbg(DBG_LEVEL_PTIRQ, in ptirq_handle_intx()
552 dev_dbg(DBG_LEVEL_PTIRQ, "dev-assign: irq=0x%x MSI VR: 0x%x-0x%x", in ptirq_softirq()
555 dev_dbg(DBG_LEVEL_PTIRQ, " vmsi_addr: 0x%lx vmsi_data: 0x%x", in ptirq_softirq()
597 dev_dbg(DBG_LEVEL_PTIRQ, "dev-assign: irq=0x%x acked vr: 0x%x", in ptirq_intx_ack()
[all …]
A Dhyperv.c184 dev_dbg(DBG_LEVEL_HYPERV, "hv: %s: MSR=0x%x wval=0x%lx vcpuid=%d vmid=%d", in hyperv_wrmsr()
224 dev_dbg(DBG_LEVEL_HYPERV, "hv: %s: MSR=0x%x rval=0x%lx vcpuid=%d vmid=%d", in hyperv_rdmsr()
253 dev_dbg(DBG_LEVEL_HYPERV, "%s, tsc_scale = 0x%lx, tsc_offset = %ld", in hyperv_init_time()
309 dev_dbg(DBG_LEVEL_HYPERV, "hv: %s: leaf=%x subleaf=%x flags=%x eax=%x ebx=%x ecx=%x edx=%x", in hyperv_init_vcpuid_entry()
A Dept.c322 dev_dbg(DBG_LEVEL_EPT, "%s, vm[%d] hpa: 0x%016lx gpa: 0x%016lx size: 0x%016lx prot: 0x%016x\n", in ept_add_mr()
340 dev_dbg(DBG_LEVEL_EPT, "%s,vm[%d] gpa 0x%lx size 0x%lx\n", __func__, vm->vm_id, gpa, size); in ept_modify_mr()
355 dev_dbg(DBG_LEVEL_EPT, "%s,vm[%d] gpa 0x%lx size 0x%lx\n", __func__, vm->vm_id, gpa, size); in ept_del_mr()
A Dvept.c181 dev_dbg(VETP_LOG_LEVEL, "[%s], vept_desc[%llx] ref[%d] shadow_eptp[%llx] guest_eptp[%llx]", in get_vept_desc()
206 dev_dbg(VETP_LOG_LEVEL, "[%s], vept_desc[%llx] ref[%d] shadow_eptp[%llx] guest_eptp[%llx]", in put_vept_desc()
A Dvirq.c156 dev_dbg(DBG_LEVEL_INTR, "VPIC: to inject PIC vector %d\n", in vcpu_do_pending_extint()
A Dvmcs.c603 dev_dbg(DBG_LEVEL_LAPICPT, "%s: switching to x2apic and passthru", __func__); in switch_apicv_mode_x2apic()
/hypervisor/arch/x86/
A Dpagetable.c131 dev_dbg(DBG_LEVEL_MMU, "%s, paddr: 0x%lx, pbase: 0x%lx\n", __func__, ref_paddr, pbase); in split_large_page()
182 dev_dbg(DBG_LEVEL_MMU, "%s, vaddr: [0x%lx - 0x%lx]\n", __func__, vaddr, vaddr_end); in modify_or_del_pte()
221 dev_dbg(DBG_LEVEL_MMU, "%s, vaddr: [0x%lx - 0x%lx]\n", __func__, vaddr, vaddr_end); in modify_or_del_pde()
268 dev_dbg(DBG_LEVEL_MMU, "%s, vaddr: [0x%lx - 0x%lx]\n", __func__, vaddr, vaddr_end); in modify_or_del_pdpte()
365 dev_dbg(DBG_LEVEL_MMU, "%s, vaddr: 0x%lx, size: 0x%lx\n", in pgtable_modify_or_del_map()
392 dev_dbg(DBG_LEVEL_MMU, "%s, paddr: 0x%lx, vaddr: [0x%lx - 0x%lx]\n", in add_pte()
424 dev_dbg(DBG_LEVEL_MMU, "%s, paddr: 0x%lx, vaddr: [0x%lx - 0x%lx]\n", in add_pde()
474 …dev_dbg(DBG_LEVEL_MMU, "%s, paddr: 0x%lx, vaddr: [0x%lx - 0x%lx]\n", __func__, paddr, vaddr, vaddr… in add_pdpte()
558 …dev_dbg(DBG_LEVEL_MMU, "%s, paddr 0x%lx, vaddr 0x%lx, size 0x%lx\n", __func__, paddr_base, vaddr_b… in pgtable_add_map()
A De820.c186 dev_dbg(DBG_LEVEL_E820, "efi mmap hv_e820[%d]: type: 0x%x Base: 0x%016lx length: 0x%016lx", in init_e820_from_efi_mmap()
206 dev_dbg(DBG_LEVEL_E820, "mmap addr 0x%x entries %d\n", in init_e820_from_mmap()
215 dev_dbg(DBG_LEVEL_E820, "mmap hv_e820[%d]: type: 0x%x Base: 0x%016lx length: 0x%016lx", i, in init_e820_from_mmap()
225 dev_dbg(DBG_LEVEL_E820, "hv_e820[%d]:type: 0x%x Base: 0x%016lx length: 0x%016lx", i, in calculate_e820_ram_size()
233 dev_dbg(DBG_LEVEL_E820, "ram size: 0x%016lx ",hv_e820_ram_size); in calculate_e820_ram_size()
A Dioapic.c257 dev_dbg(DBG_LEVEL_IRQ, "GSI: irq:%d pin:%hhu rte:%lx", in ioapic_set_routing()
284 dev_dbg(DBG_LEVEL_IRQ, "GSI: irq:%d pin:%hhu rte:%lx", in ioapic_set_rte()
347 dev_dbg(DBG_LEVEL_PTIRQ, "update: irq:%d pin:%hhu rte:%lx", in ioapic_irq_gsi_mask_unmask()
350 dev_dbg(DBG_LEVEL_PTIRQ, "NULL Address returned from gsi_table_data"); in ioapic_irq_gsi_mask_unmask()
371 dev_dbg(DBG_LEVEL_IRQ, "IOAPIC version: %x", version); in ioapic_nr_pins()
A Dvtd.c378 dev_dbg(DBG_LEVEL_IOMMU, "%s: gsr:0x%x", __func__, status); in dmar_enable_intr_remapping()
398 dev_dbg(DBG_LEVEL_IOMMU, "%s: gsr:0x%x", __func__, status); in dmar_enable_translation()
824 dev_dbg(DBG_LEVEL_IOMMU, "%s: irq = %d", __func__, irq); in dmar_fault_handler()
837 dev_dbg(DBG_LEVEL_IOMMU, "%s: invalid FR Index", __func__); in dmar_fault_handler()
845 dev_dbg(DBG_LEVEL_IOMMU, "%s: record[%d] @0x%x: 0x%lx, 0x%lx", in dmar_fault_handler()
856 dev_dbg(DBG_LEVEL_IOMMU, "%s: loop more than %d times", __func__, DMAR_FAULT_LOOP_MAX); in dmar_fault_handler()
882 dev_dbg(DBG_LEVEL_IOMMU, "irq#%d vector#%d for dmar_unit", dmar_unit->dmar_irq, vector); in dmar_setup_interrupt()
925 dev_dbg(DBG_LEVEL_IOMMU, "enable dmar uint [0x%x]", dmar_unit->drhd->reg_base_addr); in prepare_dmar()
934 dev_dbg(DBG_LEVEL_IOMMU, "enable dmar uint [0x%x]", dmar_unit->drhd->reg_base_addr); in enable_dmar()
1156 dev_dbg(DBG_LEVEL_IOMMU, "ignore dmar_unit @0x%x", dmar_unit->drhd->reg_base_addr); in do_action_for_iommus()
[all …]
A Dnotify.c113 dev_dbg(DBG_LEVEL_PTIRQ, "NOTIFY: irq[%d] setup vector %x", in setup_notification()
/hypervisor/boot/guest/
A Dvboot_info.c36 dev_dbg(DBG_LEVEL_BOOT, "ramdisk mod start=0x%x, size=0x%x", (uint64_t)mod->start, mod->size); in init_vm_ramdisk_info()
57 dev_dbg(DBG_LEVEL_BOOT, "kernel mod start=0x%x, size=0x%x", in init_vm_kernel_info()
167 dev_dbg(DBG_LEVEL_BOOT, "mod counts=%d\n", abi->mods_count); in init_vm_sw_load()
A Dbzimage_loader.c118 dev_dbg(DBG_LEVEL_VM_BZIMAGE, "VM%d ramdisk load_addr: 0x%lx", vm->vm_id, ramdisk_load_gpa); in get_initrd_load_addr()
181 dev_dbg(DBG_LEVEL_VM_BZIMAGE, "VM%d kernel load_addr: 0x%lx", vm->vm_id, load_addr); in get_bzimage_kernel_load_addr()
/hypervisor/include/debug/
A Dlogmsg.h113 #define dev_dbg(lvl, ...) \ macro
/hypervisor/common/
A Dhypercall.c235 dev_dbg(DBG_LEVEL_HYCALL, "HCALL: Create VM failed"); in hcall_create_vm()
496 dev_dbg(DBG_LEVEL_HYCALL, "[%d] SET BUFFER=0x%p", in hcall_set_ioreq_buffer()
593 dev_dbg(DBG_LEVEL_HYCALL, "[%d] NOTIFY_FINISH for vcpu %d", in hcall_notify_ioreq_finish()
688 dev_dbg((ret == 0) ? DBG_LEVEL_HYCALL : LOG_ERROR, in set_vm_memory_region()
761 dev_dbg(DBG_LEVEL_HYCALL, "[vm%d] gpa=0x%x hpa=0x%x", in write_protect_page()

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