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Searched refs:mask (Results 1 – 24 of 24) sorted by relevance

/hypervisor/arch/x86/
A Dcpu.c399 bool start_pcpus(uint64_t mask) in start_pcpus() argument
403 uint64_t expected_start_mask = mask; in start_pcpus()
417 return ((pcpu_active_bitmap & mask) == mask); in start_pcpus()
433 void wait_pcpus_offline(uint64_t mask) in wait_pcpus_offline() argument
447 uint64_t mask = 0UL; in stop_pcpus() local
454 bitmap_set_nolock(pcpu_id, &mask); in stop_pcpus()
463 wait_pcpus_offline(mask); in stop_pcpus()
632 uint64_t mask = 0UL; in msr_write_pcpu() local
639 bitmap_set_nolock(pcpu_id, &mask); in msr_write_pcpu()
654 uint64_t mask = 0UL; in msr_read_pcpu() local
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A Dnotify.c46 void smp_call_function(uint64_t mask, smp_call_func_t func, void *data) in smp_call_function() argument
52 while (atomic_cmpxchg64(&smp_call_mask, 0UL, mask) != 0UL); in smp_call_function()
53 pcpu_id = ffs64(mask); in smp_call_function()
55 bitmap_clear_nolock(pcpu_id, &mask); in smp_call_function()
76 pcpu_id = ffs64(mask); in smp_call_function()
A Dlapic.c246 uint32_t mask = dest_mask; in send_dest_ipi_mask() local
248 pcpu_id = ffs64(mask); in send_dest_ipi_mask()
250 bitmap32_clear_nolock(pcpu_id, &mask); in send_dest_ipi_mask()
252 pcpu_id = ffs64(mask); in send_dest_ipi_mask()
A Dvtd.c61 static inline uint64_t dmar_get_bitslice(uint64_t var, uint64_t mask, uint32_t pos) in dmar_get_bitslice() argument
63 return ((var & mask) >> pos); in dmar_get_bitslice()
66 static inline uint64_t dmar_set_bitslice(uint64_t var, uint64_t mask, uint32_t pos, uint64_t val) in dmar_set_bitslice() argument
68 return ((var & ~mask) | ((val << pos) & mask)); in dmar_set_bitslice()
249 uint32_t mask, uint32_t pre_condition, uint32_t *status) in dmar_wait_completion() argument
258 } while( (*status & mask) == pre_condition); in dmar_wait_completion()
1278 uint64_t mask = (1UL << num) - 1U; in alloc_irtes() local
1285 test_mask = mask << (irte_idx & 0x3FU); in alloc_irtes()
1305 uint64_t mask = (1UL << num) - 1U; in dmar_reserve_irte() local
1318 dmar_unit->irte_reserved_bitmap[*start_id >> 6U] |= mask << (*start_id & 0x3FU); in dmar_reserve_irte()
A Dioapic.c330 ioapic_irq_gsi_mask_unmask(uint32_t irq, bool mask) in ioapic_irq_gsi_mask_unmask() argument
341 if (mask) { in ioapic_irq_gsi_mask_unmask()
/hypervisor/arch/x86/guest/
A Dvmx_io.c49 uint64_t mask = 0xFFFFFFFFUL >> (32UL - (8UL * pio_req->size)); in emulate_pio_complete() local
55 rax = ((rax) & ~mask) | (value & mask); in emulate_pio_complete()
70 uint32_t mask; in pio_instr_vmexit_handler() local
81 mask = 0xFFFFFFFFU >> (32U - (8U * pio_req->size)); in pio_instr_vmexit_handler()
83 pio_req->value = (uint32_t)vcpu_get_gpreg(vcpu, CPU_REG_RAX) & mask; in pio_instr_vmexit_handler()
A Dvm.c411 uint64_t base = 0UL, size = 0UL, mask; in deny_pci_bar_access() local
428 base &= mask; in deny_pci_bar_access()
429 size &= mask; in deny_pci_bar_access()
884 uint64_t mask = pcpu_mask; in offline_lapic_pt_enabled_pcpus() local
888 if (bitmap_test(this_pcpu_id, &mask)) { in offline_lapic_pt_enabled_pcpus()
913 wait_pcpus_offline(mask); in offline_lapic_pt_enabled_pcpus()
914 if (!start_pcpus(mask)) { in offline_lapic_pt_enabled_pcpus()
928 uint64_t mask; in shutdown_vm() local
952 if (mask != 0UL) { in shutdown_vm()
1003 uint64_t mask; in reset_vm() local
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A Dvirtual_cr.c248 uint64_t mask, tmp; in vmx_write_cr0() local
314 mask = cr0_trap_and_passthru_mask | cr0_passthru_mask; in vmx_write_cr0()
315 tmp = (initial_guest_cr0 & ~mask) | (effective_cr0 & mask); in vmx_write_cr0()
368 uint64_t mask, tmp; in vmx_write_cr4() local
412 mask = cr4_trap_and_passthru_mask | cr4_passthru_mask; in vmx_write_cr4()
413 tmp = (initial_guest_cr4 & ~mask) | (cr4 & mask); in vmx_write_cr4()
A Dinstr_emul.c510 uint64_t mask; in vie_canonical_check() local
517 mask = ~((1UL << 48U) - 1UL); in vie_canonical_check()
519 ret = ((gla & mask) != mask) ? 1 : 0; in vie_canonical_check()
521 ret = ((gla & mask) != 0U) ? 1 : 0; in vie_canonical_check()
665 uint64_t origval, val, mask; in vie_write_bytereg() local
673 mask = 0xffU; in vie_write_bytereg()
680 mask <<= 8U; in vie_write_bytereg()
682 val |= origval & ~mask; in vie_write_bytereg()
A Dvlapic.c106 static void vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask);
650 uint32_t *lvtptr, mask, val, idx; in vlapic_write_lvt() local
661 mask = APIC_LVT_M | APIC_LVT_DS | APIC_LVT_VECTOR; in vlapic_write_lvt()
664 mask |= APIC_LVTT_TM; in vlapic_write_lvt()
670 mask |= APIC_LVT_TM | APIC_LVT_RIRR | APIC_LVT_IIPP; in vlapic_write_lvt()
673 mask |= APIC_LVT_DM; in vlapic_write_lvt()
676 val &= mask; in vlapic_write_lvt()
836 vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask) in vlapic_set_error() argument
840 vlapic->esr_pending |= mask; in vlapic_set_error()
/hypervisor/lib/
A Dsprintf.c150 uint32_t *flags, uint64_t *mask) in get_length_modifier() argument
158 *mask = 0x000000FFU; in get_length_modifier()
162 *mask = 0x0000FFFFU; in get_length_modifier()
266 uint64_t mask; in print_pow2() local
269 mask = (1UL << shift) - 1UL; in print_pow2()
275 v &= param->vars.mask; in print_pow2()
293 *pos = (*digits)[(v & mask)]; in print_pow2()
320 v.qword = ((uint64_t)value) & param->vars.mask; in print_decimal()
451 param->vars.mask = 0xFFFFFFFFFFFFFFFFUL; in do_print()
469 &(param->vars.mask)); in do_print()
/hypervisor/include/arch/x86/asm/
A Dcpu.h461 bool start_pcpus(uint64_t mask);
462 void wait_pcpus_offline(uint64_t mask);
749 static inline void xsaves(struct xsave_area *region_addr, uint64_t mask) in xsaves() argument
753 "d" ((uint32_t)(mask >> 32U)), in xsaves()
754 "a" ((uint32_t)mask): in xsaves()
758 static inline void xrstors(const struct xsave_area *region_addr, uint64_t mask) in xrstors() argument
762 "d" ((uint32_t)(mask >> 32U)), in xrstors()
763 "a" ((uint32_t)mask): in xrstors()
A Dnotify.h17 void smp_call_function(uint64_t mask, smp_call_func_t func, void *data);
/hypervisor/dm/
A Dvpic.c80 if ((i8259->smm != 0U) && ((i8259->mask & bit) != 0U)) { in vpic_get_highest_isrpin()
161 pin, i8259->mask, i8259->request, i8259->service); in vpic_notify_intr()
172 i8259->mask, i8259->request, i8259->service); in vpic_notify_intr()
185 pin, i8259->mask, i8259->request, i8259->service); in vpic_notify_intr()
232 i8259->mask, i8259->request, i8259->service); in vpic_notify_intr()
246 i8259->mask = 0U; in vpic_icw1()
395 uint8_t old = i8259->mask; in vpic_ocw1()
400 i8259->mask = val & 0xffU; in vpic_ocw1()
718 *eax = i8259->mask; in vpic_read()
993 vpic->i8259[0].mask = 0xffU; in vpic_init()
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A Dvrtc.c619 uint8_t mask = 0xFFU; in vrtc_write() local
657 mask = 0x7FU; in vrtc_write()
661 *((uint8_t *)&vrtc->rtcdev + vrtc->addr) = (uint8_t)(value & mask); in vrtc_write()
/hypervisor/dm/vpci/
A Dpci_pt.c403 uint64_t mask; in init_bars() local
441 mask = PCI_BASE_ADDRESS_IO_MASK; in init_bars()
443 mask = PCI_BASE_ADDRESS_MEM_MASK; in init_bars()
445 vbar->base_hpa = (uint64_t)lo & mask; in init_bars()
457 vbar->mask = size32 & mask; in init_bars()
458 vbar->bar_type.bits &= (uint32_t)(~mask); in init_bars()
459 vbar->size = (uint64_t)size32 & mask; in init_bars()
486 vbar->mask = size32; in init_bars()
A Divshmem.c473 uint64_t addr, mask, size = 0UL; in init_ivshmem_bar() local
479 mask = is_pci_io_bar(vbar) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK; in init_ivshmem_bar()
480 vbar->bar_type.bits &= (~mask); in init_ivshmem_bar()
498 vbar->mask = (uint32_t) (~(size - 1UL)); in init_ivshmem_bar()
503 vbar->mask = (uint32_t) ((~(size - 1UL)) >> 32U); in init_ivshmem_bar()
A Dvdev.c114 base = lo & vbar->mask; in pci_vdev_update_vbar_base()
202 bar = val & vbar->mask; in pci_vdev_write_vbar()
A Dvmcs9900.c131 mmio_vbar->mask = (uint32_t) (~(mmio_vbar->size - 1UL)); in init_vmcs9900()
137 msix_vbar->mask = (uint32_t) (~(msix_vbar->size - 1UL)); in init_vmcs9900()
A Dvmsix_on_msi.c111 vdev->vbars[i].mask = 0xFFFFF000U & PCI_BASE_ADDRESS_MEM_MASK; in init_vmsix_on_msi()
/hypervisor/include/lib/
A Dsprintf.h43 uint64_t mask; member
/hypervisor/include/dm/
A Dvpic.h122 uint8_t mask; /* Interrupt Mask Register (IMR) */ member
A Dvpci.h47 uint32_t mask; /* BAR size mask */ member
/hypervisor/debug/
A Dshell.c961 uint64_t mask = 0UL; in shell_vcpu_dumpreg() local
1002 bitmap_set_nolock(pcpu_id, &mask); in shell_vcpu_dumpreg()
1003 smp_call_function(mask, dump_vcpu_reg, &dump); in shell_vcpu_dumpreg()
1082 uint64_t mask = 0UL; in shell_dump_guest_mem() local
1103 bitmap_set_nolock(pcpu_id, &mask); in shell_dump_guest_mem()
1104 smp_call_function(mask, dump_guest_mem, &dump); in shell_dump_guest_mem()
1330 bool level, phys, remote_irr, mask; in get_vioapic_info() local
1358 mask = (rte.bits.intr_mask == IOAPIC_RTE_MASK_SET); in get_vioapic_info()
1368 delmode >> 8U, remote_irr, mask); in get_vioapic_info()

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