Home
last modified time | relevance | path

Searched refs:mmio (Results 1 – 9 of 9) sorted by relevance

/hypervisor/dm/vpci/
A Dvmsix.c104 if ((mmio->size <= 8U) && mem_aligned_check(mmio->address, mmio->size)) { in rw_vmsix_table()
105 offset = mmio->address - vdev->msix.mmio_gpa; in rw_vmsix_table()
108 if ((mmio->size == 4U) || (mmio->size == 8U)) { in rw_vmsix_table()
116 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in rw_vmsix_table()
117 (void)memcpy_s(&mmio->value, (size_t)mmio->size, in rw_vmsix_table()
121 &mmio->value, (size_t)mmio->size); in rw_vmsix_table()
130 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in rw_vmsix_table()
131 mmio->value = mmio_read(hva, mmio->size); in rw_vmsix_table()
133 mmio_write(hva, mmio->size, mmio->value); in rw_vmsix_table()
137 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in rw_vmsix_table()
[all …]
A Divshmem.c79 } mmio; member
150 ivs_dev->mmio.regs.ivpos = vm_id; in ivshmem_server_bind_peer()
219 memset(&ivshmem_dev[i].mmio, 0U, sizeof(uint32_t) * 4); in create_ivshmem_device()
256 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in ivshmem_mmio_handler() local
262 if ((mmio->size == 4U) && ((offset & 0x3U) == 0U) && in ivshmem_mmio_handler()
263 (offset < sizeof(ivs_dev->mmio))) { in ivshmem_mmio_handler()
270 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in ivshmem_mmio_handler()
272 mmio->value = ivs_dev->mmio.data[offset >> 2U]; in ivshmem_mmio_handler()
274 mmio->value = 0UL; in ivshmem_mmio_handler()
279 doorbell.val = mmio->value; in ivshmem_mmio_handler()
[all …]
A Dvmcs9900.c44 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in vmcs9900_mmio_handler() local
50 offset = (uint16_t)(mmio->address - vbar->base_gpa); in vmcs9900_mmio_handler()
52 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in vmcs9900_mmio_handler()
53 mmio->value = vuart_read_reg(vu, offset); in vmcs9900_mmio_handler()
55 vuart_write_reg(vu, offset, (uint8_t) mmio->value); in vmcs9900_mmio_handler()
A Dvpci.c176 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in vpci_mmio_cfg_access() local
179 uint64_t address = mmio->address; in vpci_mmio_cfg_access()
194 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in vpci_mmio_cfg_access()
197 if (pci_is_valid_access(reg_num, (uint32_t)mmio->size)) { in vpci_mmio_cfg_access()
198 ret = vpci_read_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, &val); in vpci_mmio_cfg_access()
200 mmio->value = val; in vpci_mmio_cfg_access()
202 if (pci_is_valid_access(reg_num, (uint32_t)mmio->size)) { in vpci_mmio_cfg_access()
203 ret = vpci_write_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value); in vpci_mmio_cfg_access()
A Dpci_pt.c147 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in pt_vmsix_handle_table_mmio_access() local
156 if ((mmio->direction == ACRN_IOREQ_DIR_WRITE) && (index < vdev->msix.table_count)) { in pt_vmsix_handle_table_mmio_access()
/hypervisor/dm/
A Dvgpio.c87 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in vgpio_mmio_handler() local
92 uint64_t hpa = P2SB_BAR_ADDR + (mmio->address & (uint64_t)(P2SB_PCR_SPACE_SIZE_TOTAL - 1)); in vgpio_mmio_handler()
101 if (mmio->size == 4U) { in vgpio_mmio_handler()
102 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in vgpio_mmio_handler()
115 mmio->value = (uint64_t)value; in vgpio_mmio_handler()
117 value = (uint32_t)mmio->value; in vgpio_mmio_handler()
A Dvioapic.c573 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in vioapic_mmio_access_handler() local
574 uint64_t gpa = mmio->address; in vioapic_mmio_access_handler()
578 if (mmio->size == 4UL) { in vioapic_mmio_access_handler()
579 uint32_t data = (uint32_t)mmio->value; in vioapic_mmio_access_handler()
581 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in vioapic_mmio_access_handler()
583 mmio->value = (uint64_t)data; in vioapic_mmio_access_handler()
584 } else if (mmio->direction == ACRN_IOREQ_DIR_WRITE) { in vioapic_mmio_access_handler()
A Dio_req.c547 struct acrn_mmio_request *mmio = &io_req->reqs.mmio_request; in mmio_default_access_handler() local
549 if (mmio->direction == ACRN_IOREQ_DIR_READ) { in mmio_default_access_handler()
550 switch (mmio->size) { in mmio_default_access_handler()
552 mmio->value = MMIO_DEFAULT_VALUE_SIZE_1; in mmio_default_access_handler()
555 mmio->value = MMIO_DEFAULT_VALUE_SIZE_2; in mmio_default_access_handler()
558 mmio->value = MMIO_DEFAULT_VALUE_SIZE_4; in mmio_default_access_handler()
561 mmio->value = MMIO_DEFAULT_VALUE_SIZE_8; in mmio_default_access_handler()
/hypervisor/arch/x86/guest/
A Dvlapic.c2403 struct acrn_mmio_request *mmio; in apic_access_vmexit_handler() local
2427 mmio = &vcpu->req.reqs.mmio_request; in apic_access_vmexit_handler()
2432 (void)vlapic_write(vlapic, offset, mmio->value); in apic_access_vmexit_handler()
2437 (void)vlapic_read(vlapic, offset, &mmio->value); in apic_access_vmexit_handler()
2439 mmio->value = 0UL; in apic_access_vmexit_handler()

Completed in 22 milliseconds