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Searched refs:reg_base_addr (Results 1 – 4 of 4) sorted by relevance

/hypervisor/arch/x86/
A Dvtd.c213 set_paging_supervisor(drhd_rt->drhd->reg_base_addr, PAGE_SIZE); in register_hrhd_units()
230 return mmio_read32(hpa2hva(dmar_unit->drhd->reg_base_addr + offset)); in iommu_read32()
235 return mmio_read64(hpa2hva(dmar_unit->drhd->reg_base_addr + offset)); in iommu_read64()
240 mmio_write32(value, hpa2hva(dmar_unit->drhd->reg_base_addr + offset)); in iommu_write32()
245 mmio_write64(value, hpa2hva(dmar_unit->drhd->reg_base_addr + offset)); in iommu_write64()
286 pr_info("dmar unit[0x%x]", dmar_unit->drhd->reg_base_addr); in dmar_unit_show_capability()
435 …G_LEVEL_IOMMU, "Register dmar uint [%d] @0x%lx", dmar_unit->index, dmar_unit->drhd->reg_base_addr); in dmar_register_hrhd()
925 dev_dbg(DBG_LEVEL_IOMMU, "enable dmar uint [0x%x]", dmar_unit->drhd->reg_base_addr); in prepare_dmar()
934 dev_dbg(DBG_LEVEL_IOMMU, "enable dmar uint [0x%x]", dmar_unit->drhd->reg_base_addr); in enable_dmar()
1156 dev_dbg(DBG_LEVEL_IOMMU, "ignore dmar_unit @0x%x", dmar_unit->drhd->reg_base_addr); in do_action_for_iommus()
/hypervisor/acpi_parser/
A Ddmar_parse.c117 drhd->reg_base_addr = acpi_drhd->address; in handle_one_drhd()
/hypervisor/include/arch/x86/asm/
A Dvtd.h498 uint64_t reg_base_addr; member
/hypervisor/arch/x86/guest/
A Dvm.c591 ept_del_mr(vm, pml4_page, plat_dmar_info.drhd_units[i].reg_base_addr, PAGE_SIZE); in prepare_service_vm_memmap()

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