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Searched refs:res (Results 1 – 18 of 18) sorted by relevance

/hypervisor/dm/
A Dmmio_dev.c19 const struct acrn_mmiores *res; in assign_mmio_dev() local
22 res = &mmiodev->res[i]; in assign_mmio_dev()
25 mem_aligned_check(res->size, PAGE_SIZE)) { in assign_mmio_dev()
27 is_service_vm(vm) ? res->host_pa : res->user_vm_pa, in assign_mmio_dev()
28 res->size, EPT_RWX | (res->mem_type & EPT_MT_MASK)); in assign_mmio_dev()
31 __FUNCTION__, i, res->user_vm_pa, res->host_pa, res->size); in assign_mmio_dev()
44 const struct acrn_mmiores *res; in deassign_mmio_dev() local
47 res = &mmiodev->res[i]; in deassign_mmio_dev()
48 gpa = is_service_vm(vm) ? res->host_pa : res->user_vm_pa; in deassign_mmio_dev()
49 if (ept_is_valid_mr(vm, gpa, res->size)) { in deassign_mmio_dev()
[all …]
A Dvgpio.c134 void register_vgpio_handler(struct acrn_vm *vm, const struct acrn_mmiores *res) in register_vgpio_handler() argument
139 gpa_start = res->user_vm_pa + (P2SB_BASE_GPIO_PORT_ID << P2SB_PORTID_SHIFT); in register_vgpio_handler()
142 base_hpa = res->host_pa + (P2SB_BASE_GPIO_PORT_ID << P2SB_PORTID_SHIFT); in register_vgpio_handler()
/hypervisor/arch/x86/guest/
A Dvcat.c143 return bitmap_weight(get_max_pcbm(vm, res)); in vcat_get_vcbm_len()
152 uint64_t max_pcbm = get_max_pcbm(vm, res); in vcat_get_max_vcbm()
167 uint64_t max_pcbm = get_max_pcbm(vm, res); in vcat_pcbm_to_vcbm()
225 uint64_t max_pcbm = get_max_pcbm(vm, res); in vcbm_to_pcbm()
314 int res = -1; in write_vcbm() local
319 res = RDT_RESOURCE_L2; in write_vcbm()
322 res = RDT_RESOURCE_L3; in write_vcbm()
327 if (res >= 0) { in write_vcbm()
332 uint64_t masked_vcbm = val & vcat_get_max_vcbm(vm, res); in write_vcbm()
360 pcbm = vcbm_to_pcbm(vm, val, res); in write_vcbm()
[all …]
A Dvcpuid.c316 int res; in set_vcpuid_vcat_10h_subleaf_res() local
319 res = RDT_RESOURCE_L3; in set_vcpuid_vcat_10h_subleaf_res()
321 res = RDT_RESOURCE_L2; in set_vcpuid_vcat_10h_subleaf_res()
323 vcbm_len = vcat_get_vcbm_len(vm, res); in set_vcpuid_vcat_10h_subleaf_res()
338 entry.ebx = (uint32_t)vcat_pcbm_to_vcbm(vm, entry.ebx, res); in set_vcpuid_vcat_10h_subleaf_res()
A Dvm.c400 if ((vm_config->pt_p2sb_bar) && (vm_config->mmiodevs[i].res[0].host_pa == P2SB_BAR_ADDR)) { in prepare_prelaunched_vm_memmap()
401 register_vgpio_handler(vm, &vm_config->mmiodevs[i].res[0]); in prepare_prelaunched_vm_memmap()
/hypervisor/arch/x86/
A Drdt.c30 const struct rdt_ins *get_rdt_res_ins(int res, uint16_t pcpu_id) in get_rdt_res_ins() argument
33 struct rdt_type *info = &res_cap_info[res]; in get_rdt_res_ins()
50 uint32_t res = info->res_id; in setup_res_clos_msr() local
53 if (res != RDT_RESID_MBA && ins->res.cache.is_cdp_enabled) { in setup_res_clos_msr()
61 switch (res) { in setup_res_clos_msr()
70 ASSERT(res < RDT_NUM_RESOURCES, "Support only 3 RDT resources. res=%d is invalid", res); in setup_res_clos_msr()
/hypervisor/debug/
A Dnpk_log.c83 param->res = HV_NPK_LOG_RES_KO; in npk_log_setup()
91 param->res = HV_NPK_LOG_RES_OK; in npk_log_setup()
111 param->res = HV_NPK_LOG_RES_OK; in npk_log_setup()
117 param->res = HV_NPK_LOG_RES_OK; in npk_log_setup()
120 param->res = npk_log_enabled ? HV_NPK_LOG_RES_ENABLED : in npk_log_setup()
131 pr_info("HV_NPK_LOG: result %d\n", param->res); in npk_log_setup()
/hypervisor/dm/vpci/
A Dvdev.c98 struct pci_mmio_res *res = (base < (1UL << 32UL)) ? &(vpci->res32): &(vpci->res64); in is_pci_mem_bar_base_valid() local
100 return ((base >= res->start) && (base <= res->end)); in is_pci_mem_bar_base_valid()
108 struct pci_mmio_res *res; in pci_vdev_update_vbar_base() local
155 res = (base < (1UL << 32UL)) ? &(vdev->vpci->res32) : &(vdev->vpci->res64); in pci_vdev_update_vbar_base()
165 res->start, res->end, vdev->vbars[idx].size); in pci_vdev_update_vbar_base()
/hypervisor/include/arch/x86/asm/guest/
A Dvcat.h14 uint16_t vcat_get_vcbm_len(const struct acrn_vm *vm, int res);
17 uint64_t vcat_pcbm_to_vcbm(const struct acrn_vm *vm, uint64_t pcbm, int res);
/hypervisor/include/arch/x86/asm/
A Drdt.h38 } res; member
59 const struct rdt_ins *get_rdt_res_ins(int res, uint16_t pcpu_id);
A Dmmu.h88 uint64_t res; member
/hypervisor/include/dm/
A Dvgpio.h10 void register_vgpio_handler(struct acrn_vm *vm, const struct acrn_mmiores *res);
A Dvrtc.h47 uint8_t res[36]; member
/hypervisor/lib/
A Dsprintf.c582 size_t res = 0U; in vsnprintf() local
611 res = snparam.wrtn; in vsnprintf()
614 return res; in vsnprintf()
622 size_t res; in snprintf() local
627 res = vsnprintf(dest, sz, fmt, args); in snprintf()
633 return res; in snprintf()
/hypervisor/quirks/
A Dsecurity_vm_fixup.c70 vtpm2->lasa = dev->res[1].user_vm_pa; in tpm2_fixup()
73 dev->res[1].size = tpm2->laml; in tpm2_fixup()
74 dev->res[1].host_pa = tpm2->lasa; in tpm2_fixup()
/hypervisor/hw/
A Dpci.c254 static void get_pci_bar_resource(union pci_bdf bdf, uint32_t offset, struct pci_bar_resource *res) in get_pci_bar_resource() argument
256 res->phy_bar = pci_pdev_read_cfg(bdf, offset, 4U); in get_pci_bar_resource()
259 res->size_mask = pci_pdev_read_cfg(bdf, offset, 4U); in get_pci_bar_resource()
260 pci_pdev_write_cfg(bdf, offset, 4U, res->phy_bar); in get_pci_bar_resource()
/hypervisor/include/public/
A Dacrn_hv_defs.h216 uint16_t res; member
A Dacrn_common.h708 } res[MMIODEV_RES_NUM]; member

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