Home
last modified time | relevance | path

Searched refs:vbars (Results 1 – 8 of 8) sorted by relevance

/hypervisor/dm/vpci/
A Dvdev.c110 vbar = &vdev->vbars[idx]; in pci_vdev_update_vbar_base()
117 vbar = &vdev->vbars[idx + 1U]; in pci_vdev_update_vbar_base()
149 vdev->vbars[idx].base_hpa, lo & PCI_BASE_ADDRESS_IO_MASK); in pci_vdev_update_vbar_base()
154 || (!mem_aligned_check(base, vdev->vbars[idx].size))) { in pci_vdev_update_vbar_base()
165 res->start, res->end, vdev->vbars[idx].size); in pci_vdev_update_vbar_base()
170 vdev->vbars[idx].base_gpa = base; in pci_vdev_update_vbar_base()
180 …if ((is_pci_io_bar(&vdev->vbars[idx])) && (vdev->vbars[idx].base_gpa != vdev->vbars[idx].base_hpa)… in check_pt_dev_pio_bars()
185 vdev->vbars[idx].base_hpa, vdev->vbars[idx].base_gpa); in check_pt_dev_pio_bars()
200 vbar = &vdev->vbars[idx]; in pci_vdev_write_vbar()
A Dvmsix_on_msi.c83 if (vdev->vbars[i].base_hpa == 0UL){ in init_vmsix_on_msi()
86 if (is_pci_mem64lo_bar(&vdev->vbars[i])) { in init_vmsix_on_msi()
109 vdev->vbars[i].size = 4096U; in init_vmsix_on_msi()
110 vdev->vbars[i].base_hpa = 0x0UL; in init_vmsix_on_msi()
111 vdev->vbars[i].mask = 0xFFFFF000U & PCI_BASE_ADDRESS_MEM_MASK; in init_vmsix_on_msi()
113 vdev->vbars[i].bar_type.bits = PCIM_BAR_MEM_32; in init_vmsix_on_msi()
122 vdev->vbars[i].base_gpa = vdev->pci_dev_config->vbar_base[i]; in init_vmsix_on_msi()
123 pci_vdev_write_vbar(vdev, i, (uint32_t)vdev->vbars[i].base_gpa); in init_vmsix_on_msi()
A Dpci_pt.c207 vbar = &vdev->vbars[msix->table_bar]; in vdev_pt_map_msix()
228 struct pci_vbar *vbar = &vdev->vbars[idx]; in vdev_pt_unmap_mem_vbar()
249 struct pci_vbar *vbar = &vdev->vbars[idx]; in vdev_pt_map_mem_vbar()
277 struct pci_vbar *vbar = &vdev->vbars[idx]; in vdev_pt_allow_io_vbar()
295 struct pci_vbar *vbar = &vdev->vbars[idx]; in vdev_pt_deny_io_vbar()
308 struct pci_vbar *vbar = &vdev->vbars[idx]; in vdev_pt_write_vbar()
415 vbar = &vdev->sriov.vbars[idx]; in init_bars()
418 vbar = &vdev->vbars[idx]; in init_bars()
481 vbar = &vdev->sriov.vbars[idx]; in init_bars()
483 vbar = &vdev->vbars[idx]; in init_bars()
[all …]
A Dvmcs9900.c47 struct pci_vbar *vbar = &vdev->vbars[MCS9900_MMIO_BAR]; in vmcs9900_mmio_handler()
64 struct pci_vbar *vbar = &vdev->vbars[idx]; in map_vmcs9900_vbar()
86 struct pci_vbar *vbar = &vdev->vbars[idx]; in unmap_vmcs9900_vbar()
113 struct pci_vbar *mmio_vbar = &vdev->vbars[MCS9900_MMIO_BAR]; in init_vmcs9900()
114 struct pci_vbar *msix_vbar = &vdev->vbars[MCS9900_MSIX_BAR]; in init_vmcs9900()
A Divshmem.c259 uint64_t offset = mmio->address - vdev->vbars[IVSHMEM_MMIO_BAR].base_gpa; in ivshmem_mmio_handler()
346 struct pci_vbar *vbar = &vdev->vbars[idx]; in ivshmem_vbar_unmap()
388 struct pci_vbar *vbar = &vdev->vbars[idx]; in ivshmem_vbar_map()
477 vbar = &vdev->vbars[bar_idx]; in init_ivshmem_bar()
501 vbar = &vdev->vbars[bar_idx + 1U]; in init_ivshmem_bar()
A Dvpci.c838 vdev->vbars[idx] = vdev_in_service_vm->vbars[idx]; in vpci_assign_pcidev()
840 vdev->msix.mmio_hpa = vdev->vbars[idx].base_hpa; in vpci_assign_pcidev()
841 vdev->msix.mmio_size = vdev->vbars[idx].size; in vpci_assign_pcidev()
926 struct pci_vbar *vbar = &vdev->vbars[bar_idx]; in vpci_update_one_vbar()
934 if ((map_cb != NULL) && (vdev->vbars[update_idx].base_gpa != 0UL)) { in vpci_update_one_vbar()
A Dvsriov.c123 vf_vbar = &vf_vdev->vbars[bar_idx]; in create_vf()
124 *vf_vbar = vf_vdev->phyfun->sriov.vbars[bar_idx]; in create_vf()
/hypervisor/include/dm/
A Dvpci.h95 struct pci_vbar vbars[PCI_BAR_COUNT]; member
126 struct pci_vbar vbars[PCI_BAR_COUNT]; member

Completed in 17 milliseconds