1 /*
2  * Copyright (C) 2021-2022 Intel Corporation.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /*
8  * BIOS Information
9  * Vendor: American Megatrends International, LLC.
10  * Version: E5000XXU3F00105-BPCIe
11  * Release Date: 08/25/2021
12  * BIOS Revision: 5.19
13  *
14  * Base Board Information
15  * Manufacturer: Default string
16  * Product Name: Default string
17  * Version: Default string
18  */
19 
20 #ifndef PCI_DEVICES_H_
21 #define PCI_DEVICES_H_
22 
23 #define HOST_BRIDGE                             .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}
24 
25 #define HOST_BRIDGE_1                           .pbdf.bits = {.b = 0x00U, .d = 0x10U, .f = 0x05U}
26 
27 #define VGA_COMPATIBLE_CONTROLLER_0             .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}
28 
29 #define USB_CONTROLLER_0                        .pbdf.bits = {.b = 0x00U, .d = 0x0DU, .f = 0x00U}
30 
31 #define USB_CONTROLLER_1                        .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U}
32 
33 #define SERIAL_BUS_CONTROLLER_0                 .pbdf.bits = {.b = 0x00U, .d = 0x10U, .f = 0x00U}
34 
35 #define SERIAL_BUS_CONTROLLER_1                 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}
36 
37 #define SERIAL_BUS_CONTROLLER_2                 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U}
38 
39 #define RAM_MEMORY_0                            .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U}
40 
41 #define COMMUNICATION_CONTROLLER_0              .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U}
42 
43 #define SERIAL_CONTROLLER_0                     .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x03U}
44 
45 #define SATA_CONTROLLER_0                       .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U}
46 
47 #define PCI_BRIDGE_0                            .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U}
48 
49 #define PCI_BRIDGE_1                            .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x07U}
50 
51 #define ISA_BRIDGE_0                            .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U}
52 
53 #define AUDIO_DEVICE_0                          .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U}
54 
55 #define SMBUS_0                                 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U}
56 
57 #define ETHERNET_CONTROLLER_0                   .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x06U}
58 
59 #define ETHERNET_CONTROLLER_1                   .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}
60 
61 #define NON_VOLATILE_MEMORY_CONTROLLER_0        .pbdf.bits = {.b = 0x01U, .d = 0x00U, .f = 0x00U}
62 
63 #endif /* PCI_DEVICES_H_ */
64