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Searched refs:baseaddr (Results 1 – 12 of 12) sorted by relevance

/devicemodel/core/
A Dsw_load_common.c66 .baseaddr = 0x00000000,
72 .baseaddr = 1 * MB,
84 .baseaddr = 0x0,
90 .baseaddr = 0x0,
96 .baseaddr = 0x0,
102 .baseaddr = PCI_EMUL_ECFG_BASE,
108 .baseaddr = HIGHRAM_START_ADDR,
173 e_s = e820[i].baseaddr; in add_e820_entry()
245 e820[LOWRAM_E820_ENTRY + 1].baseaddr = e820[LOWRAM_E820_ENTRY + 2].baseaddr; in acrn_create_e820_table()
255 e820[LOWRAM_E820_ENTRY + 1].baseaddr - e820[LOWRAM_E820_ENTRY].baseaddr; in acrn_create_e820_table()
[all …]
A Dsw_load_bzimage.c110 (ctx->baseaddr + KERNEL_LOAD_OFF(ctx)); in acrn_get_bzimage_setup_size()
198 read = fread(ctx->baseaddr + RAMDISK_LOAD_OFF(ctx), in acrn_prepare_ramdisk()
244 read = fread(ctx->baseaddr + KERNEL_LOAD_OFF(ctx), in acrn_prepare_kernel()
263 (ctx->baseaddr + ZEROPAGE_LOAD_OFF(ctx)); in acrn_prepare_zeropage()
265 (ctx->baseaddr + KERNEL_LOAD_OFF(ctx)); in acrn_prepare_zeropage()
316 strncpy(ctx->baseaddr + BOOTARGS_LOAD_OFF(ctx), get_bootargs(), STR_LEN); in acrn_sw_load_bzimage()
348 memcpy(ctx->baseaddr + GDT_LOAD_OFF(ctx), &bzimage_init_gdt, in acrn_sw_load_bzimage()
A Dsw_load_vsbl.c172 read = fread(ctx->baseaddr + GUEST_PART_INFO_OFF(ctx), in acrn_prepare_guest_part_info()
226 read = fread(ctx->baseaddr + VSBL_TOP(ctx) - vsbl_size, in acrn_prepare_vsbl()
250 (ctx->baseaddr + CONFIGPAGE_OFF(ctx)); in acrn_sw_load_vsbl()
255 (ctx->baseaddr + E820_TABLE_OFF(ctx)); in acrn_sw_load_vsbl()
264 strncpy(ctx->baseaddr + BOOTARGS_OFF(ctx), get_bootargs(), STR_LEN); in acrn_sw_load_vsbl()
A Dsw_load_elf.c141 void *seg_ptr = ctx->baseaddr + elf32_phdr->p_vaddr; in load_elf32()
277 memcpy(ctx->baseaddr + GDT_LOAD_OFF(ctx), &acrn_init_gdt, in acrn_sw_load_elf()
299 mi = (struct multiboot_info *)(ctx->baseaddr + MULTIBOOT_OFFSET); in acrn_sw_load_elf()
A Dsw_load_ovmf.c169 addr = ctx->baseaddr + OVMF_TOP(ctx) - ovmf_image_size(); in acrn_prepare_ovmf()
288 e820_default_entries[LOWRAM_E820_ENTRY].baseaddr - in acrn_sw_load_ovmf()
333 memcpy(mmap_vars, ctx->baseaddr + OVMF_NVSTORAGE_OFFSET, in acrn_writeback_ovmf_nvstorage()
A Dhugetlb.c226 addr = mmap(ctx->baseaddr + offset, len, PROT_READ | PROT_WRITE, in mmap_hugetlbfs_from_level()
735 ctx->baseaddr = (void *)ALIGN_UP((size_t)ptr, in hugetlb_setup_memory()
740 pr_info("mmap ptr 0x%p -> baseaddr 0x%p\n", ptr, ctx->baseaddr); in hugetlb_setup_memory()
808 (uint64_t)ctx->baseaddr, PROT_ALL) < 0) in hugetlb_setup_memory()
819 (uint64_t)(ctx->baseaddr + 4 * GB - ctx->biosmem), in hugetlb_setup_memory()
827 (uint64_t)(ctx->baseaddr + ctx->highmem_gpa_base), in hugetlb_setup_memory()
A Dvmmapi.c409 bzero((void *)ctx->baseaddr, ctx->lowmem); in vm_unsetup_memory()
410 bzero((void *)(ctx->baseaddr + ctx->highmem_gpa_base), ctx->highmem); in vm_unsetup_memory()
430 return (ctx->baseaddr + gaddr); in vm_map_gpa()
438 return (ctx->baseaddr + gaddr); in vm_map_gpa()
/devicemodel/hw/
A Duart_core.c87 int baseaddr; member
621 uart_legacy_alloc(int which, int *baseaddr, int *irq) in uart_legacy_alloc() argument
627 *baseaddr = uart_lres[which].baseaddr; in uart_legacy_alloc()
634 uart_legacy_reinit_res(int which, int baseaddr, int irq) in uart_legacy_reinit_res() argument
639 uart_lres[which].baseaddr = baseaddr; in uart_legacy_reinit_res()
/devicemodel/include/
A Duart_core.h39 int uart_legacy_reinit_res(int which, int baseaddr, int irq);
A Dsw_load.h50 uint64_t baseaddr; member
A Dvmmapi.h58 char *baseaddr; member
/devicemodel/hw/pci/virtio/
A Dvhost.c462 (uintptr_t)ctx->baseaddr; in vhost_set_mem_table()
475 (uintptr_t)(ctx->baseaddr + ctx->highmem_gpa_base); in vhost_set_mem_table()

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