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/hypervisor/dm/vpci/
A Dvpci.c127 if (pci_is_valid_access(offset, bytes)) { in vpci_pio_cfgdata_read()
158 if (pci_is_valid_access(offset, bytes)) { in vpci_pio_cfgdata_write()
500 uint32_t offset, uint32_t bytes, uint32_t val) in write_cfg_header() argument
574 uint32_t bytes, uint32_t val) in write_pt_dev_cfg() argument
581 write_vmsi_cap_reg(vdev, offset, bytes, val); in write_pt_dev_cfg()
589 write_sriov_cap_reg(vdev, offset, bytes, val); in write_pt_dev_cfg()
607 uint32_t bytes, uint32_t *val) in read_pt_dev_cfg() argument
618 read_sriov_cap_reg(vdev, offset, bytes, val); in read_pt_dev_cfg()
647 uint32_t offset, uint32_t bytes, uint32_t *val) in vpci_read_cfg() argument
674 uint32_t offset, uint32_t bytes, uint32_t val) in vpci_write_cfg() argument
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A Dvmsix.c44 void read_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val) in read_vmsix_cap_reg() argument
50 virt = pci_vdev_read_vcfg(vdev, offset, bytes); in read_vmsix_cap_reg()
51 (void)memcpy_s((void *)&pt_mask, bytes, (void *)&msix_pt_mask[offset - vdev->msix.capoff], bytes); in read_vmsix_cap_reg()
53 phy = pci_pdev_read_cfg(vdev->pdev->bdf, offset, bytes); in read_vmsix_cap_reg()
72 bool write_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val) in write_vmsix_cap_reg() argument
81 (void)memcpy_s((void *)&ro_mask, bytes, (void *)&msix_ro_mask[offset - vdev->msix.capoff], bytes); in write_vmsix_cap_reg()
83 old = pci_vdev_read_vcfg(vdev, offset, bytes); in write_vmsix_cap_reg()
84 pci_vdev_write_vcfg(vdev, offset, bytes, (old & ro_mask) | (val & ~ro_mask)); in write_vmsix_cap_reg()
A Dvpci_priv.h151 void write_vmsi_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
156 void read_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val);
157 bool write_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
158 void read_pt_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val);
159 void write_pt_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
166 void write_vmsix_cap_reg_on_msi(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t va…
170 void read_sriov_cap_reg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val…
171 void write_sriov_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
174 uint32_t pci_vdev_read_vcfg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes);
175 void pci_vdev_write_vcfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
A Dvpci_bridge.c158 uint32_t bytes, uint32_t *val) in read_vpci_bridge_cfg() argument
160 if ((offset + bytes) <= 0x100U) { in read_vpci_bridge_cfg()
161 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_vpci_bridge_cfg()
164 *val = pci_pdev_read_cfg(vdev->pdev->bdf, offset, bytes); in read_vpci_bridge_cfg()
191 __unused uint32_t bytes, __unused uint32_t val) in write_vpci_bridge_cfg() argument
A Dvpci_mf_dev.c38 uint32_t bytes, uint32_t *val) in read_vpci_mf_dev() argument
40 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_vpci_mf_dev()
46 __unused uint32_t bytes, __unused uint32_t val) in write_vpci_mf_dev() argument
A Dvhostbridge.c241 uint32_t bytes, uint32_t *val) in read_vhostbridge_cfg() argument
243 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_vhostbridge_cfg()
268 uint32_t bytes, uint32_t val) in write_vhostbridge_cfg() argument
271 pci_vdev_write_vcfg(vdev, offset, bytes, val); in write_vhostbridge_cfg()
A Dvmsi.c102 void write_vmsi_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val) in write_vmsi_cap_reg() argument
109 (void)memcpy_s((void *)&ro_mask, bytes, (void *)&msi_ro_mask[offset - vdev->msi.capoff], bytes); in write_vmsi_cap_reg()
113 old = pci_vdev_read_vcfg(vdev, offset, bytes); in write_vmsi_cap_reg()
114 pci_vdev_write_vcfg(vdev, offset, bytes, (old & ro_mask) | (val & ~ro_mask)); in write_vmsi_cap_reg()
A Dvsriov.c281 void read_sriov_cap_reg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val) in read_sriov_cap_reg() argument
285 *val = pci_pdev_read_cfg(vdev->pdev->bdf, offset, bytes); in read_sriov_cap_reg()
295 void write_sriov_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val) in write_sriov_cap_reg() argument
313 pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); in write_sriov_cap_reg()
317 pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); in write_sriov_cap_reg()
320 pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); in write_sriov_cap_reg()
333 pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); in write_sriov_cap_reg()
336 pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); in write_sriov_cap_reg()
A Dvroot_port.c80 uint32_t bytes, uint32_t *val) in read_vrp_cfg() argument
82 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_vrp_cfg()
88 __unused uint32_t bytes, __unused uint32_t val) in write_vrp_cfg() argument
90 pci_vdev_write_vcfg(vdev, offset, bytes, val); in write_vrp_cfg()
A Dvdev.c39 uint32_t pci_vdev_read_vcfg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes) in pci_vdev_read_vcfg() argument
43 switch (bytes) { in pci_vdev_read_vcfg()
61 void pci_vdev_write_vcfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val) in pci_vdev_write_vcfg() argument
63 switch (bytes) { in pci_vdev_write_vcfg()
A Dvmcs9900.c36 uint32_t offset, uint32_t bytes, uint32_t * val) in read_vmcs9900_cfg() argument
38 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_vmcs9900_cfg()
95 uint32_t bytes, uint32_t val) in write_vmcs9900_cfg() argument
101 write_vmsix_cap_reg(vdev, offset, bytes, val); in write_vmcs9900_cfg()
103 pci_vdev_write_vcfg(vdev, offset, bytes, val); in write_vmcs9900_cfg()
A Divshmem.c312 static int32_t read_ivshmem_vdev_cfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32… in read_ivshmem_vdev_cfg() argument
314 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_ivshmem_vdev_cfg()
431 static int32_t write_ivshmem_vdev_cfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint3… in write_ivshmem_vdev_cfg() argument
437 write_vmsix_cap_reg(vdev, offset, bytes, val); in write_ivshmem_vdev_cfg()
439 pci_vdev_write_vcfg(vdev, offset, bytes, val); in write_ivshmem_vdev_cfg()
A Dpci_pt.c56 void read_pt_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val) in read_pt_vmsix_cap_reg() argument
59 *val = pci_vdev_read_vcfg(vdev, offset, bytes); in read_pt_vmsix_cap_reg()
61 read_vmsix_cap_reg(vdev, offset, bytes, val); in read_pt_vmsix_cap_reg()
71 void write_pt_vmsix_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val) in write_pt_vmsix_cap_reg() argument
75 if (write_vmsix_cap_reg(vdev, offset, bytes, val)) { in write_pt_vmsix_cap_reg()
A Dvmsix_on_msi.c129 void write_vmsix_cap_reg_on_msi(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t va… in write_vmsix_cap_reg_on_msi() argument
136 pci_vdev_write_vcfg(vdev, offset, bytes, val); in write_vmsix_cap_reg_on_msi()
/hypervisor/include/hw/
A Dpci.h313 uint32_t (*pci_read_cfg)(union pci_bdf bdf, uint32_t offset, uint32_t bytes);
314 void (*pci_write_cfg)(union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
367 uint32_t pci_pdev_read_cfg(union pci_bdf bdf, uint32_t offset, uint32_t bytes);
368 void pci_pdev_write_cfg(union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
403 static inline bool pci_is_valid_access_offset(uint32_t offset, uint32_t bytes) in pci_is_valid_access_offset() argument
405 return ((offset & (bytes - 1U)) == 0U); in pci_is_valid_access_offset()
408 static inline bool pci_is_valid_access_byte(uint32_t bytes) in pci_is_valid_access_byte() argument
410 return ((bytes == 1U) || (bytes == 2U) || (bytes == 4U)); in pci_is_valid_access_byte()
413 static inline bool pci_is_valid_access(uint32_t offset, uint32_t bytes) in pci_is_valid_access() argument
415 return (pci_is_valid_access_byte(bytes) && pci_is_valid_access_offset(offset, bytes)); in pci_is_valid_access()
/hypervisor/arch/x86/guest/
A Dvm_reset.c73 __unused size_t bytes) in handle_reset_reg_read() argument
135 static bool handle_kb_write(struct acrn_vcpu *vcpu, __unused uint16_t addr, size_t bytes, uint32_t … in handle_kb_write() argument
138 return handle_common_reset_reg_write(vcpu, ((bytes == 1U) && (val == 0xfeU)), false); in handle_kb_write()
141 static bool handle_kb_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes) in handle_kb_read() argument
143 if (is_service_vm(vcpu->vm) && (bytes == 1U)) { in handle_kb_read()
166 static bool handle_cf9_write(struct acrn_vcpu *vcpu, __unused uint16_t addr, size_t bytes, uint32_t… in handle_cf9_write() argument
172 ((bytes == 1U) && ((val & 0x4U) == 0x4U) && ((val & 0xaU) != 0U)), in handle_cf9_write()
180 static bool handle_reset_reg_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t va… in handle_reset_reg_write() argument
184 if (bytes == 1U) { in handle_reset_reg_write()
/hypervisor/hw/
A Dpci.c99 static uint32_t pci_pio_read_cfg(union pci_bdf bdf, uint32_t offset, uint32_t bytes) in pci_pio_read_cfg() argument
110 switch (bytes) { in pci_pio_read_cfg()
133 switch (bytes) { in pci_pio_write_cfg()
147 __unused uint32_t offset, __unused uint32_t bytes) in pci_pio_read_cfg() argument
153 __unused uint32_t offset, __unused uint32_t bytes, __unused uint32_t val) in pci_pio_write_cfg() argument
178 static uint32_t pci_mmcfg_read_cfg(union pci_bdf bdf, uint32_t offset, uint32_t bytes) in pci_mmcfg_read_cfg() argument
185 return (uint32_t)mmio_read(hva, bytes); in pci_mmcfg_read_cfg()
201 mmio_write(hva, bytes, val); in pci_mmcfg_write_cfg()
220 uint32_t pci_pdev_read_cfg(union pci_bdf bdf, uint32_t offset, uint32_t bytes) in pci_pdev_read_cfg() argument
224 val = acrn_pci_cfg_ops->pci_read_cfg(bdf, offset, bytes); in pci_pdev_read_cfg()
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/hypervisor/include/dm/
A Dvpci.h108 … int32_t (*write_vdev_cfg)(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
109 … int32_t (*read_vdev_cfg)(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val);
/hypervisor/dm/
A Dvpic.c786 size_t bytes, uint32_t *eax) in vpic_primary_handler() argument
793 if (bytes != 1U) { in vpic_primary_handler()
838 size_t bytes, uint32_t *eax) in vpic_secondary_handler() argument
845 if (bytes != 1U) { in vpic_secondary_handler()
888 static int32_t vpic_elc_handler(struct acrn_vpic *vpic, bool in, uint16_t port, size_t bytes, in vpic_elc_handler() argument
896 if (bytes == 1U) { in vpic_elc_handler()
/hypervisor/lib/crypto/mbedtls/
A DChangeLog389 is larger than the internal message buffer (16384 bytes by default), the
404 data. Previously, trailing zero bytes were detected and omitted for the
411 name larger than 16 bytes had been configured on the server.
837 to configure the minimum number of bytes for entropy sources using the
1025 mbedtls_pk_parse_key(file)() when the password is > 129 bytes.
1031 require reading a string of close to or larger than 2^62 bytes.
1581 * Very large records using more than 224 bytes of padding were incorrectly
1584 to 32 bytes with CBC-based ciphersuites and TLS >= 1.1
2780 than 64 bytes, thanks to Stephane Desneux and gary ng
2841 size of 16384 bytes to be rejected
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