1 /*- 2 * Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _ATKBDC_H_ 30 #define _ATKBDC_H_ 31 32 #define KBD_DATA_PORT 0x60 33 34 #define KBD_STS_CTL_PORT 0x64 35 36 #define KBDC_RESET 0xfe 37 38 #define KBD_DEV_IRQ 1 39 #define AUX_DEV_IRQ 12 40 41 /* controller commands */ 42 #define KBDC_SET_COMMAND_BYTE 0x60 43 #define KBDC_GET_COMMAND_BYTE 0x20 44 #define KBDC_DISABLE_AUX_PORT 0xa7 45 #define KBDC_ENABLE_AUX_PORT 0xa8 46 #define KBDC_TEST_AUX_PORT 0xa9 47 #define KBDC_TEST_CTRL 0xaa 48 #define KBDC_TEST_KBD_PORT 0xab 49 #define KBDC_DISABLE_KBD_PORT 0xad 50 #define KBDC_ENABLE_KBD_PORT 0xae 51 #define KBDC_READ_INPORT 0xc0 52 #define KBDC_READ_OUTPORT 0xd0 53 #define KBDC_WRITE_OUTPORT 0xd1 54 #define KBDC_WRITE_KBD_OUTBUF 0xd2 55 #define KBDC_WRITE_AUX_OUTBUF 0xd3 56 #define KBDC_WRITE_TO_AUX 0xd4 57 58 /* controller command byte (set by KBDC_SET_COMMAND_BYTE) */ 59 #define KBD_TRANSLATION 0x40 60 #define KBD_SYS_FLAG_BIT 0x04 61 #define KBD_DISABLE_KBD_PORT 0x10 62 #define KBD_DISABLE_AUX_PORT 0x20 63 #define KBD_ENABLE_AUX_INT 0x02 64 #define KBD_ENABLE_KBD_INT 0x01 65 #define KBD_KBD_CONTROL_BITS (KBD_DISABLE_KBD_PORT | KBD_ENABLE_KBD_INT) 66 #define KBD_AUX_CONTROL_BITS (KBD_DISABLE_AUX_PORT | KBD_ENABLE_AUX_INT) 67 68 /* controller status bits */ 69 #define KBDS_KBD_BUFFER_FULL 0x01 70 #define KBDS_SYS_FLAG 0x04 71 #define KBDS_CTRL_FLAG 0x08 72 #define KBDS_AUX_BUFFER_FULL 0x20 73 74 /* controller output port */ 75 #define KBDO_KBD_OUTFULL 0x10 76 #define KBDO_AUX_OUTFULL 0x20 77 78 #define RAMSZ 32 79 #define FIFOSZ 15 80 #define CTRL_CMD_FLAG 0x8000 81 82 struct vmctx; 83 84 struct kbd_dev { 85 bool irq_active; 86 int irq; 87 88 uint8_t buffer[FIFOSZ]; 89 int brd, bwr; 90 int bcnt; 91 }; 92 93 struct aux_dev { 94 bool irq_active; 95 int irq; 96 }; 97 98 struct atkbdc_base { 99 struct vmctx *ctx; 100 pthread_mutex_t mtx; 101 102 struct ps2kbd_info *ps2kbd; 103 struct ps2mouse_info *ps2mouse; 104 105 uint8_t status; /* status register */ 106 uint8_t outport; /* controller output port */ 107 uint8_t ram[RAMSZ]; /* byte0 = controller config */ 108 109 uint32_t curcmd; /* current command for next byte */ 110 uint32_t ctrlbyte; 111 112 struct kbd_dev kbd; 113 struct aux_dev aux; 114 }; 115 116 void atkbdc_init(struct vmctx *ctx); 117 void atkbdc_deinit(struct vmctx *ctx); 118 void atkbdc_event(struct atkbdc_base *base, int iskbd); 119 120 #endif /* _ATKBDC_H_ */ 121