1 /*- 2 * Copyright (c) 2013 Neel Natu <neel@freebsd.org> 3 * Copyright (c) 2018-2024 Intel Corporation. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef VUART_H 30 #define VUART_H 31 #include <types.h> 32 #include <asm/lib/spinlock.h> 33 #include <asm/vm_config.h> 34 35 /** 36 * @addtogroup vp-dm_vperipheral 37 * 38 * @{ 39 */ 40 41 /** 42 * @file 43 * @brief All APIs to support virtual UART device. 44 * 45 * This file defines macros, structures and function declarations for emulating virtual UART device. 46 */ 47 48 #define RX_BUF_SIZE CONFIG_VUART_RX_BUF_SIZE 49 #define TX_BUF_SIZE CONFIG_VUART_TX_BUF_SIZE 50 #define VUART_TIMER_CPU CONFIG_VUART_TIMER_PCPU 51 #define INVAILD_VUART_IDX 0xFFU 52 53 #define COM1_BASE 0x3F8U 54 #define COM2_BASE 0x2F8U 55 #define COM3_BASE 0x3E8U 56 #define COM4_BASE 0x2E8U 57 #define INVALID_COM_BASE 0U 58 59 #define COM1_IRQ 4U 60 #define COM2_IRQ 3U 61 #define COM3_IRQ 6U 62 #define COM4_IRQ 7U 63 64 struct vuart_fifo { 65 char *buf; 66 uint32_t rindex; /* index to read from */ 67 uint32_t windex; /* index to write to */ 68 uint32_t num; /* number of characters in the fifo */ 69 uint32_t size; /* size of the fifo */ 70 }; 71 72 /** 73 * @brief Data structure to illustrate a virtual UART device. 74 * 75 * This structure contains the information of a virtual UART device. 76 * 77 * @consistency self.vm->vuart[X] == self 78 * @alignment N/A 79 * 80 * @remark N/A 81 */ 82 struct acrn_vuart { 83 uint8_t data; /**< Data register (R/W). */ 84 uint8_t ier; /**< Interrupt enable register (R/W). */ 85 uint8_t lcr; /**< Line control register (R/W). */ 86 uint8_t mcr; /**< Modem control register (R/W). */ 87 uint8_t lsr; /**< Line status register (R/W). */ 88 uint8_t msr; /**< Modem status register (R/W). */ 89 uint8_t fcr; /**< FIFO control register (W). */ 90 uint8_t scr; /**< Scratch register (R/W). */ 91 uint8_t dll; /**< Baudrate divisor latch LSB. */ 92 uint8_t dlh; /**< Baudrate divisor latch MSB. */ 93 94 struct vuart_fifo rxfifo; /**< FIFO queue for received data. */ 95 struct vuart_fifo txfifo; /**< FIFO queue for transmitted data. */ 96 uint16_t port_base; /**< Base port address of the virtual UART device. */ 97 uint32_t irq; /**< IRQ number of the virtual UART device. */ 98 char vuart_rx_buf[RX_BUF_SIZE]; /**< Buffer for received data. */ 99 char vuart_tx_buf[TX_BUF_SIZE]; /**< Buffer for transmitted data. */ 100 bool thre_int_pending; /**< Whether Transmitter Holding Register Empty(THRE) interrupt is pending. */ 101 bool active; /**< Whether the vuart is active. */ 102 bool escaping; /**< Whether in escaping sequence, only for console vuarts. */ 103 struct acrn_vuart *target_vu; /**< Pointer to target vuart */ 104 struct acrn_vm *vm; /**< Pointer to the VM that owns the virtual UART device. */ 105 struct pci_vdev *vdev; /**< Pointer to the PCI device, only for a PCI vuart. */ 106 spinlock_t lock; /**< The spinlock to protect simultaneous access of all elements. */ 107 }; 108 109 void init_legacy_vuarts(struct acrn_vm *vm, const struct vuart_config *vu_config); 110 void deinit_legacy_vuarts(struct acrn_vm *vm); 111 void init_pci_vuart(struct pci_vdev *vdev); 112 void deinit_pci_vuart(struct pci_vdev *vdev); 113 114 void vuart_putchar(struct acrn_vuart *vu, char ch); 115 char vuart_getchar(struct acrn_vuart *vu); 116 void vuart_toggle_intr(const struct acrn_vuart *vu); 117 118 bool is_vuart_intx(const struct acrn_vm *vm, uint32_t intx_gsi); 119 120 uint8_t vuart_read_reg(struct acrn_vuart *vu, uint16_t offset); 121 void vuart_write_reg(struct acrn_vuart *vu, uint16_t offset, uint8_t value); 122 #endif /* VUART_H */ 123 124 /** 125 * @} 126 */