1/* 2 * Intel ACPI Component Architecture 3 * AML/ASL+ Disassembler version 20190703 (64-bit version) 4 * Copyright (c) 2000 - 2022 Intel Corporation 5 * 6 * ACPI Data Table [FACP] 7 * 8 * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue 9 */ 10 11[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] 12[0004] Table Length : 0000010C 13[0001] Revision : 05 14[0001] Checksum : 00 15[0006] Oem ID : "ACRN " 16[0008] Oem Table ID : "ACRNFADT" 17[0004] Oem Revision : 00000001 18[0004] Asl Compiler ID : "INTL" 19[0004] Asl Compiler Revision : 20190703 20 21[0004] FACS Address : 00000000 22[0004] DSDT Address : 000F3400 23[0001] Model : 00 24[0001] PM Profile : 00 [Unspecified] 25[0002] SCI Interrupt : 0000 26[0004] SMI Command Port : 00000000 27[0001] ACPI Enable Value : 00 28[0001] ACPI Disable Value : 00 29[0001] S4BIOS Command : 00 30[0001] P-State Control : 00 31[0004] PM1A Event Block Address : 00000000 32[0004] PM1B Event Block Address : 00000000 33[0004] PM1A Control Block Address : 00000000 34[0004] PM1B Control Block Address : 00000000 35[0004] PM2 Control Block Address : 00000000 36[0004] PM Timer Block Address : 00000000 37[0004] GPE0 Block Address : 00000000 38[0004] GPE1 Block Address : 00000000 39[0001] PM1 Event Block Length : 00 40[0001] PM1 Control Block Length : 00 41[0001] PM2 Control Block Length : 00 42[0001] PM Timer Block Length : 00 43[0001] GPE0 Block Length : 00 44[0001] GPE1 Block Length : 00 45[0001] GPE1 Base Offset : 00 46[0001] _CST Support : 00 47[0002] C2 Latency : 0000 48[0002] C3 Latency : 0000 49[0002] CPU Cache Size : 0000 50[0002] Cache Flush Stride : 0000 51[0001] Duty Cycle Offset : 00 52[0001] Duty Cycle Width : 00 53[0001] RTC Day Alarm Index : 00 54[0001] RTC Month Alarm Index : 00 55[0001] RTC Century Index : 00 56[0002] Boot Flags (decoded below) : 0000 57 Legacy Devices Supported (V2) : 0 58 8042 Present on ports 60/64 (V2) : 0 59 VGA Not Present (V4) : 0 60 MSI Not Supported (V4) : 0 61 PCIe ASPM Not Supported (V4) : 0 62 CMOS RTC Not Present (V5) : 0 63[0001] Reserved : 00 64[0004] Flags (decoded below) : 00000000 65 WBINVD instruction is operational (V1) : 1 66 WBINVD flushes all caches (V1) : 0 67 All CPUs support C1 (V1) : 1 68 C2 works on MP system (V1) : 0 69 Control Method Power Button (V1) : 0 70 Control Method Sleep Button (V1) : 0 71 RTC wake not in fixed reg space (V1) : 0 72 RTC can wake system from S4 (V1) : 0 73 32-bit PM Timer (V1) : 1 74 Docking Supported (V1) : 0 75 Reset Register Supported (V2) : 1 76 Sealed Case (V3) : 0 77 Headless - No Video (V3) : 1 78 Use native instr after SLP_TYPx (V3) : 0 79 PCIEXP_WAK Bits Supported (V4) : 0 80 Use Platform Timer (V4) : 0 81 RTC_STS valid on S4 wake (V4) : 0 82 Remote Power-on capable (V4) : 0 83 Use APIC Cluster Model (V4) : 0 84Use APIC Physical Destination Mode (V4) : 0 85 Hardware Reduced (V5) : 1 86 Low Power S0 Idle (V5) : 0 87 88[0012] Reset Register : [Generic Address Structure] 89[0001] Space ID : 01 [SystemIO] 90[0001] Bit Width : 08 91[0001] Bit Offset : 00 92[0001] Encoded Access Width : 01 [Byte Access:8] 93[0008] Address : 0000000000000CF9 94 95[0001] Value to cause reset : 0E 96[0002] ARM Flags (decoded below) : 0000 97 PSCI Compliant : 0 98 Must use HVC for PSCI : 0 99 100[0001] FADT Minor Revision : 00 101[0008] FACS Address : 0000000000000000 102[0008] DSDT Address : 0000000000000000 103[0012] PM1A Event Block : [Generic Address Structure] 104[0001] Space ID : 00 [SystemMemory] 105[0001] Bit Width : 00 106[0001] Bit Offset : 00 107[0001] Encoded Access Width : 00 [Undefined/Legacy] 108[0008] Address : 0000000000000000 109 110[0012] PM1B Event Block : [Generic Address Structure] 111[0001] Space ID : 00 [SystemMemory] 112[0001] Bit Width : 00 113[0001] Bit Offset : 00 114[0001] Encoded Access Width : 00 [Undefined/Legacy] 115[0008] Address : 0000000000000000 116 117[0012] PM1A Control Block : [Generic Address Structure] 118[0001] Space ID : 00 [SystemMemory] 119[0001] Bit Width : 00 120[0001] Bit Offset : 00 121[0001] Encoded Access Width : 00 [Undefined/Legacy] 122[0008] Address : 0000000000000000 123 124[0012] PM1B Control Block : [Generic Address Structure] 125[0001] Space ID : 00 [SystemMemory] 126[0001] Bit Width : 00 127[0001] Bit Offset : 00 128[0001] Encoded Access Width : 00 [Undefined/Legacy] 129[0008] Address : 0000000000000000 130 131[0012] PM2 Control Block : [Generic Address Structure] 132[0001] Space ID : 00 [SystemMemory] 133[0001] Bit Width : 00 134[0001] Bit Offset : 00 135[0001] Encoded Access Width : 00 [Undefined/Legacy] 136[0008] Address : 0000000000000000 137 138[0012] PM Timer Block : [Generic Address Structure] 139[0001] Space ID : 00 [SystemMemory] 140[0001] Bit Width : 00 141[0001] Bit Offset : 00 142[0001] Encoded Access Width : 00 [Undefined/Legacy] 143[0008] Address : 0000000000000000 144 145[0012] GPE0 Block : [Generic Address Structure] 146[0001] Space ID : 00 [SystemMemory] 147[0001] Bit Width : 00 148[0001] Bit Offset : 00 149[0001] Encoded Access Width : 00 [Undefined/Legacy] 150[0008] Address : 0000000000000000 151 152[0012] GPE1 Block : [Generic Address Structure] 153[0001] Space ID : 00 [SystemMemory] 154[0001] Bit Width : 00 155[0001] Bit Offset : 00 156[0001] Encoded Access Width : 00 [Undefined/Legacy] 157[0008] Address : 0000000000000000 158[0012] Sleep Control Register : [Generic Address Structure] 159[0001] Space ID : 01 [SystemIO] 160[0001] Bit Width : 08 161[0001] Bit Offset : 00 162[0001] Encoded Access Width : 01 [Byte Access:8] 163[0008] Address : 0000000000000400 164 165[0012] Sleep Status Register : [Generic Address Structure] 166[0001] Space ID : 01 [SystemIO] 167[0001] Bit Width : 08 168[0001] Bit Offset : 00 169[0001] Encoded Access Width : 01 [Byte Access:8] 170[0008] Address : 0000000000000401 171