1<?xml version="1.0" encoding="utf-8"?>
2
3<!-- Copyright (C) 2021-2022 Intel Corporation. -->
4<!-- SPDX-License-Identifier: BSD-3-Clause -->
5
6<xsl:stylesheet
7    version="1.0"
8    xmlns:xi="http://www.w3.org/2003/XInclude"
9    xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
10    xmlns:dyn="http://exslt.org/dynamic"
11    xmlns:math="http://exslt.org/math"
12    xmlns:acrn="http://projectacrn.org">
13  <xsl:include href="lib.xsl" />
14  <xsl:output method="text" />
15
16  <xsl:template match="/acrn-offline-data">
17    <!-- Declaration of license -->
18    <xsl:value-of select="$license" />
19
20    <!-- Header include guard -->
21    <xsl:value-of select="acrn:include-guard('BOARD_INFO_H')" />
22
23    <xsl:apply-templates select="config-data/acrn-config" />
24    <xsl:apply-templates select="board-data/acrn-config" />
25    <xsl:apply-templates select="allocation-data/acrn-config" />
26
27    <xsl:value-of select="acrn:include-guard-end('BOARD_INFO_H')" />
28  </xsl:template>
29
30  <xsl:template match="config-data/acrn-config">
31    <xsl:if test="count(//p2sb[text() = 'y'])">
32      <xsl:call-template name="p2sb" />
33    </xsl:if>
34    <xsl:call-template name="MAX_HIDDEN_PDEVS_NUM" />
35  </xsl:template>
36
37  <xsl:template match="board-data/acrn-config">
38    <xsl:call-template name="MAX_PCPU_NUM" />
39    <xsl:call-template name="MAX_VMSIX_ON_MSI_PDEVS_NUM" />
40    <xsl:variable name="physical_address_bits" select="//processors/model/attribute[@id='physical_address_bits']/text()" />
41    <xsl:if test="$physical_address_bits">
42      <xsl:value-of select="acrn:define('MAXIMUM_PA_WIDTH', $physical_address_bits[1], 'U')" />
43    </xsl:if>
44  </xsl:template>
45
46  <xsl:template match="allocation-data/acrn-config">
47    <xsl:apply-templates select="hv/MMIO" />
48  </xsl:template>
49
50  <xsl:template name="p2sb">
51    <xsl:value-of select="acrn:define('P2SB_VGPIO_DM_ENABLED', '', '')" />
52    <xsl:value-of select="acrn:define('P2SB_BAR_ADDR', '0xFD000000', 'UL')" />
53    <xsl:value-of select="acrn:define('P2SB_BAR_ADDR_GPA', '0xFD000000', 'UL')" />
54    <xsl:value-of select="acrn:define('P2SB_BAR_SIZE', '0x1000000', 'UL')" />
55    <xsl:value-of select="acrn:define('P2SB_BASE_GPIO_PORT_ID', '0x69', 'U')" />
56    <xsl:value-of select="acrn:define('P2SB_MAX_GPIO_COMMUNITIES', '0x6', 'U')" />
57  </xsl:template>
58
59  <xsl:template name="MAX_HIDDEN_PDEVS_NUM">
60    <xsl:value-of select="acrn:define('MAX_HIDDEN_PDEVS_NUM', acrn:get-hidden-device-num(), 'U')" />
61  </xsl:template>
62
63  <xsl:template name="MAX_PCPU_NUM">
64    <xsl:value-of select="acrn:define('MAX_PCPU_NUM', count(//processors//thread), 'U')" />
65  </xsl:template>
66
67  <xsl:template name="MAX_VMSIX_ON_MSI_PDEVS_NUM">
68    <xsl:value-of select="acrn:define('MAX_VMSIX_ON_MSI_PDEVS_NUM', sum(dyn:map(//device, 'acrn:is-vmsix-supported-device(./vendor, ./identifier)')), 'U')" />
69  </xsl:template>
70
71  <xsl:template match="MMIO">
72    <xsl:value-of select="acrn:define('MMIO32_START', //MMIO32_START, 'UL')" />
73    <xsl:value-of select="acrn:define('MMIO32_END', //MMIO32_END, 'UL')" />
74    <xsl:value-of select="acrn:define('MMIO64_START', //MMIO64_START, 'UL')" />
75    <xsl:value-of select="acrn:define('MMIO64_END', //MMIO64_END, 'UL')" />
76    <xsl:value-of select="acrn:define('HI_MMIO_START', //HI_MMIO_START, 'UL')" />
77    <xsl:value-of select="acrn:define('HI_MMIO_END', //HI_MMIO_END, 'UL')" />
78  </xsl:template>
79
80</xsl:stylesheet>
81