1 // © 2021 Qualcomm Innovation Center, Inc. All rights reserved. 2 // 3 // SPDX-License-Identifier: BSD-3-Clause 4 5 // Non-temporal accesses perform poorly on Cortex-A53 because they suppress 6 // allocation in the L1 cache. In most cases it is better to do a regular 7 // keep-prefetch instead. Note that there is a bit in CPUACTLR that has the 8 // same effect, and it is set by default at reset on r0p4 and later. 9 #define prefetch_load_stream(addr) prefetch_load_keep(addr) 10 #define prefetch_store_stream(addr) prefetch_store_keep(addr) 11 12 #include <asm-generic/prefetch.h> 13