Lines Matching refs:tmp
20 .macro VFPFLDMIA, base, tmp
30 ldr \tmp, =elf_hwcap @ may not have MVFR regs
31 ldr \tmp, [\tmp, #0]
32 tst \tmp, #HWCAP_VFPD32
36 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
37 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
38 cmp \tmp, #2 @ 32 x 64bit registers?
46 .macro VFPFSTMIA, base, tmp
55 ldr \tmp, =elf_hwcap @ may not have MVFR regs
56 ldr \tmp, [\tmp, #0]
57 tst \tmp, #HWCAP_VFPD32
61 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
62 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
63 cmp \tmp, #2 @ 32 x 64bit registers?