Lines Matching refs:IRQ_INTERNAL_BASE
645 #define BCM_3368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
646 #define BCM_3368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
647 #define BCM_3368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
648 #define BCM_3368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
652 #define BCM_3368_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
653 #define BCM_3368_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
654 #define BCM_3368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
655 #define BCM_3368_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
656 #define BCM_3368_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
666 #define BCM_3368_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17)
667 #define BCM_3368_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18)
668 #define BCM_3368_PCI_IRQ (IRQ_INTERNAL_BASE + 31)
682 #define BCM_3368_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25)
683 #define BCM_3368_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
684 #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
685 #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
691 #define BCM_6328_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
693 #define BCM_6328_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
695 #define BCM_6328_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
697 #define BCM_6328_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
701 #define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
702 #define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
705 #define BCM_6328_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
706 #define BCM_6328_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
707 #define BCM_6328_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
708 #define BCM_6328_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
709 #define BCM_6328_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
710 #define BCM_6328_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
711 #define BCM_6328_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
717 #define BCM_6328_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
730 #define BCM_6328_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
731 #define BCM_6328_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
732 #define BCM_6328_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
733 #define BCM_6328_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
734 #define BCM_6328_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
735 #define BCM_6328_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
740 #define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
741 #define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
742 #define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
744 #define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5)
745 #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
747 #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
758 #define BCM_6338_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
759 #define BCM_6338_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
779 #define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
781 #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
783 #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
784 #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
786 #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
797 #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)
798 #define BCM_6345_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 2)
818 #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
819 #define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
820 #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
822 #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
823 #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
824 #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
825 #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
827 #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
836 #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20)
837 #define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21)
838 #define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22)
839 #define BCM_6348_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 23)
840 #define BCM_6348_PCI_IRQ (IRQ_INTERNAL_BASE + 24)
841 #define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24)
842 #define BCM_6348_ATM_IRQ (IRQ_INTERNAL_BASE + 5)
857 #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
858 #define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
859 #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
860 #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
861 #define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29)
862 #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
863 #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
864 #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
866 #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
867 #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
875 #define BCM_6358_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
876 #define BCM_6358_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
877 #define BCM_6358_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17)
878 #define BCM_6358_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18)
879 #define BCM_6358_PCI_IRQ (IRQ_INTERNAL_BASE + 31)
880 #define BCM_6358_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24)
881 #define BCM_6358_ATM_IRQ (IRQ_INTERNAL_BASE + 19)
893 #define BCM_6358_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 23)
894 #define BCM_6358_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 24)
895 #define BCM_6358_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25)
896 #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
897 #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
898 #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
903 #define BCM_6362_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
905 #define BCM_6362_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
906 #define BCM_6362_SPI_IRQ (IRQ_INTERNAL_BASE + 2)
907 #define BCM_6362_UART0_IRQ (IRQ_INTERNAL_BASE + 3)
908 #define BCM_6362_UART1_IRQ (IRQ_INTERNAL_BASE + 4)
909 #define BCM_6362_DSL_IRQ (IRQ_INTERNAL_BASE + 28)
913 #define BCM_6362_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 14)
914 #define BCM_6362_HSSPI_IRQ (IRQ_INTERNAL_BASE + 5)
915 #define BCM_6362_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
916 #define BCM_6362_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
917 #define BCM_6362_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
918 #define BCM_6362_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 20)
919 #define BCM_6362_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 21)
920 #define BCM_6362_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 22)
921 #define BCM_6362_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 23)
922 #define BCM_6362_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 24)
923 #define BCM_6362_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 25)
929 #define BCM_6362_PCI_IRQ (IRQ_INTERNAL_BASE + 30)
942 #define BCM_6362_RING_OSC_IRQ (IRQ_INTERNAL_BASE + 1)
943 #define BCM_6362_WLAN_GPIO_IRQ (IRQ_INTERNAL_BASE + 6)
944 #define BCM_6362_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
945 #define BCM_6362_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
946 #define BCM_6362_NAND_IRQ (IRQ_INTERNAL_BASE + 12)
947 #define BCM_6362_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
948 #define BCM_6362_DG_IRQ (IRQ_INTERNAL_BASE + 15)
949 #define BCM_6362_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
950 #define BCM_6362_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
951 #define BCM_6362_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
952 #define BCM_6362_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
953 #define BCM_6362_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
954 #define BCM_6362_IPSEC_DMA1_IRQ (IRQ_INTERNAL_BASE + 27)
955 #define BCM_6362_FAP0_IRQ (IRQ_INTERNAL_BASE + 29)
968 #define BCM_6368_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
970 #define BCM_6368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
971 #define BCM_6368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
972 #define BCM_6368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
973 #define BCM_6368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
974 #define BCM_6368_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
977 #define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15)
979 #define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
980 #define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7)
981 #define BCM_6368_USBD_IRQ (IRQ_INTERNAL_BASE + 8)
982 #define BCM_6368_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 26)
983 #define BCM_6368_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 27)
984 #define BCM_6368_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 28)
985 #define BCM_6368_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 29)
986 #define BCM_6368_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 30)
987 #define BCM_6368_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 31)
993 #define BCM_6368_PCI_IRQ (IRQ_INTERNAL_BASE + 13)
1003 #define BCM_6368_XTM_IRQ (IRQ_INTERNAL_BASE + 11)
1008 #define BCM_6368_EXT_IRQ0 (IRQ_INTERNAL_BASE + 20)
1009 #define BCM_6368_EXT_IRQ1 (IRQ_INTERNAL_BASE + 21)
1010 #define BCM_6368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 22)
1011 #define BCM_6368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 23)
1012 #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
1013 #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)