Lines Matching refs:name
30 #define GIC_ACCESSOR_RO(sz, off, name) \ argument
31 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_SHARED_OFS + off, name) \
32 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_REDIR_OFS + off, redir_##name)
35 #define GIC_ACCESSOR_RW(sz, off, name) \ argument
36 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_SHARED_OFS + off, name) \
37 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_REDIR_OFS + off, redir_##name)
40 #define GIC_VX_ACCESSOR_RO(sz, off, name) \ argument
41 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name) \
42 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
45 #define GIC_VX_ACCESSOR_RW(sz, off, name) \ argument
46 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name) \
47 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
50 #define _GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name) \ argument
51 static inline void __iomem *addr_gic_##name(unsigned int intr) \
56 static inline unsigned int read_gic_##name(unsigned int intr) \
59 return __raw_readl(addr_gic_##name(intr)); \
63 #define _GIC_ACCESSOR_RW_INTR_REG(sz, off, stride, name) \ argument
64 _GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name) \
66 static inline void write_gic_##name(unsigned int intr, \
70 __raw_writel(val, addr_gic_##name(intr)); \
73 #define GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name) \ argument
74 _GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name) \
75 _GIC_ACCESSOR_RO_INTR_REG(sz, MIPS_GIC_REDIR_OFS + off, stride, redir_##name)
77 #define GIC_ACCESSOR_RW_INTR_REG(sz, off, stride, name) \ argument
78 _GIC_ACCESSOR_RW_INTR_REG(sz, off, stride, name) \
79 _GIC_ACCESSOR_RW_INTR_REG(sz, MIPS_GIC_REDIR_OFS + off, stride, redir_##name)
82 #define GIC_VX_ACCESSOR_RO_INTR_REG(sz, off, stride, name) \ argument
84 stride, vl_##name) \
86 stride, vo_##name)
89 #define GIC_VX_ACCESSOR_RW_INTR_REG(sz, off, stride, name) \ argument
91 stride, vl_##name) \
93 stride, vo_##name)
96 #define _GIC_ACCESSOR_RO_INTR_BIT(off, name) \ argument
97 static inline void __iomem *addr_gic_##name(void) \
102 static inline unsigned int read_gic_##name(unsigned int intr) \
104 void __iomem *addr = addr_gic_##name(); \
119 #define _GIC_ACCESSOR_RW_INTR_BIT(off, name) \ argument
120 _GIC_ACCESSOR_RO_INTR_BIT(off, name) \
122 static inline void write_gic_##name(unsigned int intr) \
124 void __iomem *addr = addr_gic_##name(); \
135 static inline void change_gic_##name(unsigned int intr, \
138 void __iomem *addr = addr_gic_##name(); \
159 #define GIC_ACCESSOR_RO_INTR_BIT(off, name) \ argument
160 _GIC_ACCESSOR_RO_INTR_BIT(off, name) \
161 _GIC_ACCESSOR_RO_INTR_BIT(MIPS_GIC_REDIR_OFS + off, redir_##name)
163 #define GIC_ACCESSOR_RW_INTR_BIT(off, name) \ argument
164 _GIC_ACCESSOR_RW_INTR_BIT(off, name) \
165 _GIC_ACCESSOR_RW_INTR_BIT(MIPS_GIC_REDIR_OFS + off, redir_##name)
168 #define GIC_VX_ACCESSOR_RO_INTR_BIT(sz, off, name) \ argument
170 vl_##name) \
172 vo_##name)
175 #define GIC_VX_ACCESSOR_RW_INTR_BIT(sz, off, name) \ argument
177 vl_##name) \
179 vo_##name)