Lines Matching refs:sel
1572 #define ___read_32bit_c0_register(source, sel, vol) \ argument
1574 if (sel == 0) \
1582 "mfc0\t%0, " #source ", " #sel "\n\t" \
1588 #define ___read_64bit_c0_register(source, sel, vol) \ argument
1591 __res = __read_64bit_c0_split(source, sel, vol); \
1592 else if (sel == 0) \
1603 "dmfc0\t%0, " #source ", " #sel "\n\t" \
1609 #define __read_32bit_c0_register(source, sel) \ argument
1610 ___read_32bit_c0_register(source, sel, __volatile__)
1612 #define __read_const_32bit_c0_register(source, sel) \ argument
1613 ___read_32bit_c0_register(source, sel,)
1615 #define __read_64bit_c0_register(source, sel) \ argument
1616 ___read_64bit_c0_register(source, sel, __volatile__)
1618 #define __read_const_64bit_c0_register(source, sel) \ argument
1619 ___read_64bit_c0_register(source, sel,)
1621 #define __write_32bit_c0_register(register, sel, value) \ argument
1623 if (sel == 0) \
1631 "mtc0\t%z0, " #register ", " #sel "\n\t" \
1636 #define __write_64bit_c0_register(register, sel, value) \ argument
1639 __write_64bit_c0_split(register, sel, value); \
1640 else if (sel == 0) \
1651 "dmtc0\t%z0, " #register ", " #sel "\n\t" \
1656 #define __read_ulong_c0_register(reg, sel) \ argument
1658 (unsigned long) __read_32bit_c0_register(reg, sel) : \
1659 (unsigned long) __read_64bit_c0_register(reg, sel))
1661 #define __read_const_ulong_c0_register(reg, sel) \ argument
1663 (unsigned long) __read_const_32bit_c0_register(reg, sel) : \
1664 (unsigned long) __read_const_64bit_c0_register(reg, sel))
1666 #define __write_ulong_c0_register(reg, sel, val) \ argument
1669 __write_32bit_c0_register(reg, sel, val); \
1671 __write_64bit_c0_register(reg, sel, val); \
1696 #define __read_64bit_c0_split(source, sel, vol) \ argument
1702 if (sel == 0) \
1715 "dmfc0\t%L0, " #source ", " #sel "\n\t" \
1725 #define __write_64bit_c0_split(source, sel, val) \ argument
1736 "dmtc0\t%L0, " #source ", " #sel "\n\t" \
1739 else if (sel == 0) \
1758 "dmtc0\t%L0, " #source ", " #sel "\n\t" \
1766 _ASM_MACRO_2R_1S(mfhc0, rt, rs, sel, \
1767 _ASM_INSN_IF_MIPS(0x40400000 | __rt << 16 | __rs << 11 | \\sel) \
1768 _ASM_INSN32_IF_MM(0x000000f4 | __rt << 21 | __rs << 16 | \\sel << 11))
1771 _ASM_MACRO_2R_1S(mthc0, rt, rd, sel, \
1772 _ASM_INSN_IF_MIPS(0x40c00000 | __rt << 16 | __rd << 11 | \\sel) \
1773 _ASM_INSN32_IF_MM(0x000002f4 | __rt << 21 | __rd << 16 | \\sel << 11))
1782 #define __readx_32bit_c0_register(source, sel) \ argument
1794 : "i" (sel)); \
1798 #define __writex_32bit_c0_register(register, sel, value) \ argument
1808 : "Jr" (value), "i" (sel)); \
2202 _ASM_MACRO_2R_1S(mfgc0, rt, rs, sel, \
2203 _ASM_INSN_IF_MIPS(0x40600000 | __rt << 16 | __rs << 11 | \\sel) \
2204 _ASM_INSN32_IF_MM(0x000004fc | __rt << 21 | __rs << 16 | \\sel << 11))
2207 _ASM_MACRO_2R_1S(dmfgc0, rt, rs, sel, \
2208 _ASM_INSN_IF_MIPS(0x40600100 | __rt << 16 | __rs << 11 | \\sel) \
2209 _ASM_INSN32_IF_MM(0x580004fc | __rt << 21 | __rs << 16 | \\sel << 11))
2212 _ASM_MACRO_2R_1S(mtgc0, rt, rd, sel, \
2213 _ASM_INSN_IF_MIPS(0x40600200 | __rt << 16 | __rd << 11 | \\sel) \
2214 _ASM_INSN32_IF_MM(0x000006fc | __rt << 21 | __rd << 16 | \\sel << 11))
2217 _ASM_MACRO_2R_1S(dmtgc0, rt, rd, sel, \
2218 _ASM_INSN_IF_MIPS(0x40600300 | __rt << 16 | __rd << 11 | \\sel) \
2219 _ASM_INSN32_IF_MM(0x580006fc | __rt << 21 | __rd << 16 | \\sel << 11))
2262 #define __read_32bit_gc0_register(source, sel) \ argument
2271 : "i" (sel)); \
2275 #define __read_64bit_gc0_register(source, sel) \ argument
2284 : "i" (sel)); \
2288 #define __write_32bit_gc0_register(register, sel, value) \ argument
2297 "i" (sel)); \
2300 #define __write_64bit_gc0_register(register, sel, value) \ argument
2309 "i" (sel)); \
2312 #define __read_ulong_gc0_register(reg, sel) \ argument
2314 (unsigned long) __read_32bit_gc0_register(reg, sel) : \
2315 (unsigned long) __read_64bit_gc0_register(reg, sel))
2317 #define __write_ulong_gc0_register(reg, sel, val) \ argument
2320 __write_32bit_gc0_register(reg, sel, val); \
2322 __write_64bit_gc0_register(reg, sel, val); \