Lines Matching refs:P
67 P = 2, enumerator
938 [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
947 [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
1044 [C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P },
1045 [C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P },
1048 [C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P },
1049 [C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P },
1125 [C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P },
1126 [C(RESULT_MISS)] = { 0x1d, CNTR_EVEN, P },
1129 [C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P },
1130 [C(RESULT_MISS)] = { 0x1d, CNTR_EVEN, P },
1411 [C(RESULT_ACCESS)] = { 28, CNTR_EVEN, P },
1412 [C(RESULT_MISS)] = { 28, CNTR_ODD, P },
1415 [C(RESULT_ACCESS)] = { 28, CNTR_EVEN, P },
1416 [C(RESULT_MISS)] = { 28, CNTR_ODD, P },
1722 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1733 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1748 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1758 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1772 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1789 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1804 raw_event.range = P; in mipsxx_pmu_map_raw_event()