Lines Matching refs:pp
188 static void cps_gen_cache_routine(u32 **pp, struct uasm_label **pl, in cps_gen_cache_routine() argument
202 UASM_i_LA(pp, GPR_T0, (long)CKSEG0); in cps_gen_cache_routine()
206 uasm_i_addiu(pp, GPR_T1, GPR_T0, cache_size); in cps_gen_cache_routine()
208 UASM_i_LA(pp, GPR_T1, (long)(CKSEG0 + cache_size)); in cps_gen_cache_routine()
211 uasm_build_label(pl, *pp, lbl); in cps_gen_cache_routine()
216 uasm_i_cache(pp, op, 0, GPR_T0); in cps_gen_cache_routine()
217 uasm_i_addiu(pp, GPR_T0, GPR_T0, cache->linesz); in cps_gen_cache_routine()
219 uasm_i_cache(pp, op, i * cache->linesz, GPR_T0); in cps_gen_cache_routine()
225 uasm_i_addiu(pp, GPR_T0, GPR_T0, unroll_lines * cache->linesz); in cps_gen_cache_routine()
228 uasm_il_bne(pp, pr, GPR_T0, GPR_T1, lbl); in cps_gen_cache_routine()
229 uasm_i_nop(pp); in cps_gen_cache_routine()
232 static int cps_gen_flush_fsb(u32 **pp, struct uasm_label **pl, in cps_gen_flush_fsb() argument
274 uasm_i_mfc0(pp, GPR_T2, 25, (perf_counter * 2) + 0); /* PerfCtlN */ in cps_gen_flush_fsb()
275 uasm_i_mfc0(pp, GPR_T3, 25, (perf_counter * 2) + 1); /* PerfCntN */ in cps_gen_flush_fsb()
278 uasm_i_addiu(pp, GPR_T0, GPR_ZERO, (perf_event << 5) | 0xf); in cps_gen_flush_fsb()
279 uasm_i_mtc0(pp, GPR_T0, 25, (perf_counter * 2) + 0); /* PerfCtlN */ in cps_gen_flush_fsb()
280 uasm_i_ehb(pp); in cps_gen_flush_fsb()
281 uasm_i_mtc0(pp, GPR_ZERO, 25, (perf_counter * 2) + 1); /* PerfCntN */ in cps_gen_flush_fsb()
282 uasm_i_ehb(pp); in cps_gen_flush_fsb()
285 UASM_i_LA(pp, GPR_T0, (long)CKSEG0); in cps_gen_flush_fsb()
288 uasm_build_label(pl, *pp, lbl); in cps_gen_flush_fsb()
292 uasm_i_lw(pp, GPR_ZERO, i * line_size * line_stride, GPR_T0); in cps_gen_flush_fsb()
299 uasm_i_cache(pp, Hit_Invalidate_D, in cps_gen_flush_fsb()
301 uasm_i_cache(pp, Hit_Writeback_Inv_SD, in cps_gen_flush_fsb()
306 uasm_i_sync(pp, __SYNC_full); in cps_gen_flush_fsb()
307 uasm_i_ehb(pp); in cps_gen_flush_fsb()
310 uasm_i_mfc0(pp, GPR_T1, 25, (perf_counter * 2) + 1); /* PerfCntN */ in cps_gen_flush_fsb()
313 uasm_il_beqz(pp, pr, GPR_T1, lbl); in cps_gen_flush_fsb()
314 uasm_i_nop(pp); in cps_gen_flush_fsb()
317 uasm_i_mtc0(pp, GPR_T2, 25, (perf_counter * 2) + 0); /* PerfCtlN */ in cps_gen_flush_fsb()
318 uasm_i_ehb(pp); in cps_gen_flush_fsb()
319 uasm_i_mtc0(pp, GPR_T3, 25, (perf_counter * 2) + 1); /* PerfCntN */ in cps_gen_flush_fsb()
320 uasm_i_ehb(pp); in cps_gen_flush_fsb()
325 static void cps_gen_set_top_bit(u32 **pp, struct uasm_label **pl, in cps_gen_set_top_bit() argument
329 uasm_i_lui(pp, GPR_T0, uasm_rel_hi(0x80000000)); in cps_gen_set_top_bit()
330 uasm_build_label(pl, *pp, lbl); in cps_gen_set_top_bit()
331 uasm_i_ll(pp, GPR_T1, 0, r_addr); in cps_gen_set_top_bit()
332 uasm_i_or(pp, GPR_T1, GPR_T1, GPR_T0); in cps_gen_set_top_bit()
333 uasm_i_sc(pp, GPR_T1, 0, r_addr); in cps_gen_set_top_bit()
334 uasm_il_beqz(pp, pr, GPR_T1, lbl); in cps_gen_set_top_bit()
335 uasm_i_nop(pp); in cps_gen_set_top_bit()