Lines Matching refs:__stringify
101 " .4byte ((\\opcode << " __stringify(INSN_R_OPCODE_SHIFT) ") |" \
102 " (\\func3 << " __stringify(INSN_R_FUNC3_SHIFT) ") |" \
103 " (\\func7 << " __stringify(INSN_R_FUNC7_SHIFT) ") |" \
104 " (.L__gpr_num_\\rd << " __stringify(INSN_R_RD_SHIFT) ") |" \
105 " (.L__gpr_num_\\rs1 << " __stringify(INSN_R_RS1_SHIFT) ") |" \
106 " (.L__gpr_num_\\rs2 << " __stringify(INSN_R_RS2_SHIFT) "))\n" \
112 " .4byte ((\\opcode << " __stringify(INSN_I_OPCODE_SHIFT) ") |" \
113 " (\\func3 << " __stringify(INSN_I_FUNC3_SHIFT) ") |" \
114 " (.L__gpr_num_\\rd << " __stringify(INSN_I_RD_SHIFT) ") |" \
115 " (.L__gpr_num_\\rs1 << " __stringify(INSN_I_RS1_SHIFT) ") |" \
116 " (\\simm12 << " __stringify(INSN_I_SIMM12_SHIFT) "))\n" \
122 " .4byte ((\\opcode << " __stringify(INSN_S_OPCODE_SHIFT) ") |" \
123 " (\\func3 << " __stringify(INSN_S_FUNC3_SHIFT) ") |" \
124 " (.L__gpr_num_\\rs2 << " __stringify(INSN_S_RS2_SHIFT) ") |" \
125 " (.L__gpr_num_\\rs1 << " __stringify(INSN_S_RS1_SHIFT) ") |" \
126 " ((\\simm12 & 0x1f) << " __stringify(INSN_S_SIMM5_SHIFT) ") |" \
127 " (((\\simm12 >> 5) & 0x7f) << " __stringify(INSN_S_SIMM7_SHIFT) "))\n" \