Lines Matching refs:SH_RD
111 #define SH_RD 7 macro
132 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3))
154 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
410 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
412 ((insn >> SH_RD) & 0x1f)) { in handle_scalar_misaligned_load()
419 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
421 ((insn >> SH_RD) & 0x1f)) { in handle_scalar_misaligned_load()
427 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
435 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
442 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
446 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()