Lines Matching refs:f
22 if (riscv_isa_extension_available(vcpu->arch.isa, f) || in kvm_riscv_vcpu_fp_reset()
41 else if (riscv_isa_extension_available(isa, f)) in kvm_riscv_vcpu_guest_fp_save()
53 else if (riscv_isa_extension_available(isa, f)) in kvm_riscv_vcpu_guest_fp_restore()
64 else if (riscv_isa_extension_available(NULL, f)) in kvm_riscv_vcpu_host_fp_save()
72 else if (riscv_isa_extension_available(NULL, f)) in kvm_riscv_vcpu_host_fp_restore()
90 riscv_isa_extension_available(vcpu->arch.isa, f)) { in kvm_riscv_vcpu_get_reg_fp()
94 reg_val = &cntx->fp.f.fcsr; in kvm_riscv_vcpu_get_reg_fp()
95 else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) && in kvm_riscv_vcpu_get_reg_fp()
96 reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) in kvm_riscv_vcpu_get_reg_fp()
97 reg_val = &cntx->fp.f.f[reg_num]; in kvm_riscv_vcpu_get_reg_fp()
106 } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) && in kvm_riscv_vcpu_get_reg_fp()
107 reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) { in kvm_riscv_vcpu_get_reg_fp()
110 reg_val = &cntx->fp.d.f[reg_num]; in kvm_riscv_vcpu_get_reg_fp()
135 riscv_isa_extension_available(vcpu->arch.isa, f)) { in kvm_riscv_vcpu_set_reg_fp()
139 reg_val = &cntx->fp.f.fcsr; in kvm_riscv_vcpu_set_reg_fp()
140 else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) && in kvm_riscv_vcpu_set_reg_fp()
141 reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) in kvm_riscv_vcpu_set_reg_fp()
142 reg_val = &cntx->fp.f.f[reg_num]; in kvm_riscv_vcpu_set_reg_fp()
151 } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) && in kvm_riscv_vcpu_set_reg_fp()
152 reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) { in kvm_riscv_vcpu_set_reg_fp()
155 reg_val = &cntx->fp.d.f[reg_num]; in kvm_riscv_vcpu_set_reg_fp()