Lines Matching refs:dir0_msn
175 unsigned char dir0, dir0_msn, dir1 = 0; in early_init_cyrix() local
178 dir0_msn = dir0 >> 4; /* identifies CPU "family" */ in early_init_cyrix()
180 switch (dir0_msn) { in early_init_cyrix()
194 unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0; in init_cyrix() local
214 Cx86_dir0_msb = dir0_msn = dir0 >> 4; /* identifies CPU "family" */ in init_cyrix()
227 switch (dir0_msn) { in init_cyrix()
321 dir0_msn++; /* M II */ in init_cyrix()
340 dir0_msn = 0; in init_cyrix()
345 dir0_msn = 0; in init_cyrix()
352 dir0_msn = 7; in init_cyrix()
355 strcpy(buf, Cx86_model[dir0_msn & 7]); in init_cyrix()