Lines Matching refs:vdev
39 static void platform_init(struct ivpu_device *vdev) in platform_init() argument
41 int platform = ivpu_hw_btrs_platform_read(vdev); in platform_init()
43 ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n", platform_to_str(platform), platform); in platform_init()
50 vdev->platform = platform; in platform_init()
54 ivpu_err(vdev, "Invalid platform type: %d\n", platform); in platform_init()
59 static void wa_init(struct ivpu_device *vdev) in wa_init() argument
61 vdev->wa.punit_disabled = false; in wa_init()
62 vdev->wa.clear_runtime_mem = false; in wa_init()
64 if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL) in wa_init()
65 vdev->wa.interrupt_clear_with_0 = ivpu_hw_btrs_irqs_clear_with_0_mtl(vdev); in wa_init()
67 if (ivpu_device_id(vdev) == PCI_DEVICE_ID_LNL && in wa_init()
68 ivpu_revision(vdev) < IVPU_HW_IP_REV_LNL_B0) in wa_init()
69 vdev->wa.disable_clock_relinquish = true; in wa_init()
72 vdev->wa.disable_clock_relinquish = false; in wa_init()
75 vdev->wa.disable_clock_relinquish = true; in wa_init()
77 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) in wa_init()
78 vdev->wa.wp0_during_power_up = true; in wa_init()
81 vdev->wa.disable_d0i2 = true; in wa_init()
91 static void timeouts_init(struct ivpu_device *vdev) in timeouts_init() argument
94 vdev->timeout.boot = -1; in timeouts_init()
95 vdev->timeout.jsm = -1; in timeouts_init()
96 vdev->timeout.tdr = -1; in timeouts_init()
97 vdev->timeout.inference = -1; in timeouts_init()
98 vdev->timeout.autosuspend = -1; in timeouts_init()
99 vdev->timeout.d0i3_entry_msg = -1; in timeouts_init()
100 } else if (ivpu_is_fpga(vdev)) { in timeouts_init()
101 vdev->timeout.boot = 50; in timeouts_init()
102 vdev->timeout.jsm = 15000; in timeouts_init()
103 vdev->timeout.tdr = 30000; in timeouts_init()
104 vdev->timeout.inference = 900000; in timeouts_init()
105 vdev->timeout.autosuspend = -1; in timeouts_init()
106 vdev->timeout.d0i3_entry_msg = 500; in timeouts_init()
107 vdev->timeout.state_dump_msg = 10000; in timeouts_init()
108 } else if (ivpu_is_simics(vdev)) { in timeouts_init()
109 vdev->timeout.boot = 50; in timeouts_init()
110 vdev->timeout.jsm = 500; in timeouts_init()
111 vdev->timeout.tdr = 10000; in timeouts_init()
112 vdev->timeout.inference = 300000; in timeouts_init()
113 vdev->timeout.autosuspend = 100; in timeouts_init()
114 vdev->timeout.d0i3_entry_msg = 100; in timeouts_init()
115 vdev->timeout.state_dump_msg = 10; in timeouts_init()
117 vdev->timeout.boot = 1000; in timeouts_init()
118 vdev->timeout.jsm = 500; in timeouts_init()
119 vdev->timeout.tdr = 2000; in timeouts_init()
120 vdev->timeout.inference = 60000; in timeouts_init()
121 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) in timeouts_init()
122 vdev->timeout.autosuspend = 10; in timeouts_init()
124 vdev->timeout.autosuspend = 100; in timeouts_init()
125 vdev->timeout.d0i3_entry_msg = 5; in timeouts_init()
126 vdev->timeout.state_dump_msg = 100; in timeouts_init()
130 static void priority_bands_init(struct ivpu_device *vdev) in priority_bands_init() argument
133 vdev->hw->hws.grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE] = 0; in priority_bands_init()
134 vdev->hw->hws.process_grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE] = 50000; in priority_bands_init()
135 vdev->hw->hws.process_quantum[VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE] = 160000; in priority_bands_init()
137 vdev->hw->hws.grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL] = 50000; in priority_bands_init()
138 vdev->hw->hws.process_grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL] = 50000; in priority_bands_init()
139 vdev->hw->hws.process_quantum[VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL] = 300000; in priority_bands_init()
141 vdev->hw->hws.grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS] = 50000; in priority_bands_init()
142 vdev->hw->hws.process_grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS] = 50000; in priority_bands_init()
143 vdev->hw->hws.process_quantum[VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS] = 200000; in priority_bands_init()
145 vdev->hw->hws.grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME] = 0; in priority_bands_init()
146 vdev->hw->hws.process_grace_period[VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME] = 50000; in priority_bands_init()
147 vdev->hw->hws.process_quantum[VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME] = 200000; in priority_bands_init()
150 static void memory_ranges_init(struct ivpu_device *vdev) in memory_ranges_init() argument
152 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) { in memory_ranges_init()
153 ivpu_hw_range_init(&vdev->hw->ranges.global, 0x80000000, SZ_512M); in memory_ranges_init()
154 ivpu_hw_range_init(&vdev->hw->ranges.user, 0x88000000, 511 * SZ_1M); in memory_ranges_init()
155 ivpu_hw_range_init(&vdev->hw->ranges.shave, 0x180000000, SZ_2G); in memory_ranges_init()
156 ivpu_hw_range_init(&vdev->hw->ranges.dma, 0x200000000, SZ_128G); in memory_ranges_init()
158 ivpu_hw_range_init(&vdev->hw->ranges.global, 0x80000000, SZ_512M); in memory_ranges_init()
159 ivpu_hw_range_init(&vdev->hw->ranges.shave, 0x80000000, SZ_2G); in memory_ranges_init()
160 ivpu_hw_range_init(&vdev->hw->ranges.user, 0x100000000, SZ_256G); in memory_ranges_init()
161 vdev->hw->ranges.dma = vdev->hw->ranges.user; in memory_ranges_init()
165 static int wp_enable(struct ivpu_device *vdev) in wp_enable() argument
167 return ivpu_hw_btrs_wp_drive(vdev, true); in wp_enable()
170 static int wp_disable(struct ivpu_device *vdev) in wp_disable() argument
172 return ivpu_hw_btrs_wp_drive(vdev, false); in wp_disable()
175 int ivpu_hw_power_up(struct ivpu_device *vdev) in ivpu_hw_power_up() argument
181 ret = wp_disable(vdev); in ivpu_hw_power_up()
183 ivpu_warn(vdev, "Failed to disable workpoint: %d\n", ret); in ivpu_hw_power_up()
186 ret = ivpu_hw_btrs_d0i3_disable(vdev); in ivpu_hw_power_up()
188 ivpu_warn(vdev, "Failed to disable D0I3: %d\n", ret); in ivpu_hw_power_up()
190 ret = wp_enable(vdev); in ivpu_hw_power_up()
192 ivpu_err(vdev, "Failed to enable workpoint: %d\n", ret); in ivpu_hw_power_up()
196 if (ivpu_hw_btrs_gen(vdev) >= IVPU_HW_BTRS_LNL) { in ivpu_hw_power_up()
198 ivpu_hw_btrs_clock_relinquish_disable_lnl(vdev); in ivpu_hw_power_up()
199 ivpu_hw_btrs_profiling_freq_reg_set_lnl(vdev); in ivpu_hw_power_up()
200 ivpu_hw_btrs_ats_print_lnl(vdev); in ivpu_hw_power_up()
203 ret = ivpu_hw_ip_host_ss_configure(vdev); in ivpu_hw_power_up()
205 ivpu_err(vdev, "Failed to configure host SS: %d\n", ret); in ivpu_hw_power_up()
209 ivpu_hw_ip_idle_gen_disable(vdev); in ivpu_hw_power_up()
211 ret = ivpu_hw_btrs_wait_for_clock_res_own_ack(vdev); in ivpu_hw_power_up()
213 ivpu_err(vdev, "Timed out waiting for clock resource own ACK\n"); in ivpu_hw_power_up()
217 ret = ivpu_hw_ip_pwr_domain_enable(vdev); in ivpu_hw_power_up()
219 ivpu_err(vdev, "Failed to enable power domain: %d\n", ret); in ivpu_hw_power_up()
223 ret = ivpu_hw_ip_host_ss_axi_enable(vdev); in ivpu_hw_power_up()
225 ivpu_err(vdev, "Failed to enable AXI: %d\n", ret); in ivpu_hw_power_up()
229 if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_LNL) in ivpu_hw_power_up()
230 ivpu_hw_btrs_set_port_arbitration_weights_lnl(vdev); in ivpu_hw_power_up()
232 ret = ivpu_hw_ip_top_noc_enable(vdev); in ivpu_hw_power_up()
234 ivpu_err(vdev, "Failed to enable TOP NOC: %d\n", ret); in ivpu_hw_power_up()
239 static void save_d0i3_entry_timestamp(struct ivpu_device *vdev) in save_d0i3_entry_timestamp() argument
241 vdev->hw->d0i3_entry_host_ts = ktime_get_boottime(); in save_d0i3_entry_timestamp()
242 vdev->hw->d0i3_entry_vpu_ts = ivpu_hw_ip_read_perf_timer_counter(vdev); in save_d0i3_entry_timestamp()
245 int ivpu_hw_reset(struct ivpu_device *vdev) in ivpu_hw_reset() argument
249 if (ivpu_hw_btrs_ip_reset(vdev)) { in ivpu_hw_reset()
250 ivpu_err(vdev, "Failed to reset NPU IP\n"); in ivpu_hw_reset()
254 if (wp_disable(vdev)) { in ivpu_hw_reset()
255 ivpu_err(vdev, "Failed to disable workpoint\n"); in ivpu_hw_reset()
262 int ivpu_hw_power_down(struct ivpu_device *vdev) in ivpu_hw_power_down() argument
266 save_d0i3_entry_timestamp(vdev); in ivpu_hw_power_down()
268 if (!ivpu_hw_is_idle(vdev)) in ivpu_hw_power_down()
269 ivpu_warn(vdev, "NPU not idle during power down\n"); in ivpu_hw_power_down()
271 if (ivpu_hw_reset(vdev)) { in ivpu_hw_power_down()
272 ivpu_err(vdev, "Failed to reset NPU\n"); in ivpu_hw_power_down()
276 if (ivpu_hw_btrs_d0i3_enable(vdev)) { in ivpu_hw_power_down()
277 ivpu_err(vdev, "Failed to enter D0I3\n"); in ivpu_hw_power_down()
284 int ivpu_hw_init(struct ivpu_device *vdev) in ivpu_hw_init() argument
286 ivpu_hw_btrs_info_init(vdev); in ivpu_hw_init()
287 ivpu_hw_btrs_freq_ratios_init(vdev); in ivpu_hw_init()
288 priority_bands_init(vdev); in ivpu_hw_init()
289 memory_ranges_init(vdev); in ivpu_hw_init()
290 platform_init(vdev); in ivpu_hw_init()
291 wa_init(vdev); in ivpu_hw_init()
292 timeouts_init(vdev); in ivpu_hw_init()
293 atomic_set(&vdev->hw->firewall_irq_counter, 0); in ivpu_hw_init()
303 int ivpu_hw_boot_fw(struct ivpu_device *vdev) in ivpu_hw_boot_fw() argument
307 ivpu_hw_ip_snoop_disable(vdev); in ivpu_hw_boot_fw()
308 ivpu_hw_ip_tbu_mmu_enable(vdev); in ivpu_hw_boot_fw()
309 ret = ivpu_hw_ip_soc_cpu_boot(vdev); in ivpu_hw_boot_fw()
311 ivpu_err(vdev, "Failed to boot SOC CPU: %d\n", ret); in ivpu_hw_boot_fw()
316 void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable) in ivpu_hw_profiling_freq_drive() argument
318 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) { in ivpu_hw_profiling_freq_drive()
319 vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT; in ivpu_hw_profiling_freq_drive()
324 vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_HIGH; in ivpu_hw_profiling_freq_drive()
326 vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT; in ivpu_hw_profiling_freq_drive()
329 void ivpu_irq_handlers_init(struct ivpu_device *vdev) in ivpu_irq_handlers_init() argument
331 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) in ivpu_irq_handlers_init()
332 vdev->hw->irq.ip_irq_handler = ivpu_hw_ip_irq_handler_37xx; in ivpu_irq_handlers_init()
334 vdev->hw->irq.ip_irq_handler = ivpu_hw_ip_irq_handler_40xx; in ivpu_irq_handlers_init()
336 if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL) in ivpu_irq_handlers_init()
337 vdev->hw->irq.btrs_irq_handler = ivpu_hw_btrs_irq_handler_mtl; in ivpu_irq_handlers_init()
339 vdev->hw->irq.btrs_irq_handler = ivpu_hw_btrs_irq_handler_lnl; in ivpu_irq_handlers_init()
342 void ivpu_hw_irq_enable(struct ivpu_device *vdev) in ivpu_hw_irq_enable() argument
344 ivpu_hw_ip_irq_enable(vdev); in ivpu_hw_irq_enable()
345 ivpu_hw_btrs_irq_enable(vdev); in ivpu_hw_irq_enable()
348 void ivpu_hw_irq_disable(struct ivpu_device *vdev) in ivpu_hw_irq_disable() argument
350 ivpu_hw_btrs_irq_disable(vdev); in ivpu_hw_irq_disable()
351 ivpu_hw_ip_irq_disable(vdev); in ivpu_hw_irq_disable()
356 struct ivpu_device *vdev = ptr; in ivpu_hw_irq_handler() local
359 ivpu_hw_btrs_global_int_disable(vdev); in ivpu_hw_irq_handler()
361 btrs_handled = ivpu_hw_btrs_irq_handler(vdev, irq); in ivpu_hw_irq_handler()
362 if (!ivpu_hw_is_idle((vdev)) || !btrs_handled) in ivpu_hw_irq_handler()
363 ip_handled = ivpu_hw_ip_irq_handler(vdev, irq); in ivpu_hw_irq_handler()
368 ivpu_hw_btrs_global_int_enable(vdev); in ivpu_hw_irq_handler()
373 pm_runtime_mark_last_busy(vdev->drm.dev); in ivpu_hw_irq_handler()