Lines Matching refs:eip93
65 inline void eip93_irq_disable(struct eip93_device *eip93, u32 mask) in eip93_irq_disable() argument
67 __raw_writel(mask, eip93->base + EIP93_REG_MASK_DISABLE); in eip93_irq_disable()
70 inline void eip93_irq_enable(struct eip93_device *eip93, u32 mask) in eip93_irq_enable() argument
72 __raw_writel(mask, eip93->base + EIP93_REG_MASK_ENABLE); in eip93_irq_enable()
75 inline void eip93_irq_clear(struct eip93_device *eip93, u32 mask) in eip93_irq_clear() argument
77 __raw_writel(mask, eip93->base + EIP93_REG_INT_CLR); in eip93_irq_clear()
99 static int eip93_register_algs(struct eip93_device *eip93, u32 supported_algo_flags) in eip93_register_algs() argument
107 eip93_algs[i]->eip93 = eip93; in eip93_register_algs()
175 static void eip93_handle_result_descriptor(struct eip93_device *eip93) in eip93_handle_result_descriptor() argument
188 left = readl(eip93->base + EIP93_REG_PE_RD_COUNT) & EIP93_PE_RD_COUNT; in eip93_handle_result_descriptor()
191 eip93_irq_clear(eip93, EIP93_INT_RDR_THRESH); in eip93_handle_result_descriptor()
192 eip93_irq_enable(eip93, EIP93_INT_RDR_THRESH); in eip93_handle_result_descriptor()
199 scoped_guard(spinlock_irqsave, &eip93->ring->read_lock) in eip93_handle_result_descriptor()
200 rdesc = eip93_get_descriptor(eip93); in eip93_handle_result_descriptor()
202 dev_err(eip93->dev, "Ndesc: %d nreq: %d\n", in eip93_handle_result_descriptor()
225 writel(1, eip93->base + EIP93_REG_PE_RD_COUNT); in eip93_handle_result_descriptor()
226 eip93_irq_clear(eip93, EIP93_INT_RDR_THRESH); in eip93_handle_result_descriptor()
241 scoped_guard(spinlock_bh, &eip93->ring->idr_lock) { in eip93_handle_result_descriptor()
242 async = idr_find(&eip93->ring->crypto_async_idr, crypto_idr); in eip93_handle_result_descriptor()
243 idr_remove(&eip93->ring->crypto_async_idr, crypto_idr); in eip93_handle_result_descriptor()
247 err = eip93_parse_ctrl_stat_err(eip93, err); in eip93_handle_result_descriptor()
263 struct eip93_device *eip93 = (struct eip93_device *)data; in eip93_done_task() local
265 eip93_handle_result_descriptor(eip93); in eip93_done_task()
270 struct eip93_device *eip93 = data; in eip93_irq_handler() local
273 irq_status = readl(eip93->base + EIP93_REG_INT_MASK_STAT); in eip93_irq_handler()
275 eip93_irq_disable(eip93, EIP93_INT_RDR_THRESH); in eip93_irq_handler()
276 tasklet_schedule(&eip93->ring->done_task); in eip93_irq_handler()
281 eip93_irq_clear(eip93, irq_status); in eip93_irq_handler()
283 eip93_irq_disable(eip93, irq_status); in eip93_irq_handler()
288 static void eip93_initialize(struct eip93_device *eip93, u32 supported_algo_flags) in eip93_initialize() argument
297 writel(val, eip93->base + EIP93_REG_PE_CONFIG); in eip93_initialize()
303 val = readl(eip93->base + EIP93_REG_PE_CONFIG); in eip93_initialize()
305 writel(val, eip93->base + EIP93_REG_PE_CONFIG); in eip93_initialize()
317 writel(val, eip93->base + EIP93_REG_PE_CLOCK_CTRL); in eip93_initialize()
322 writel(val, eip93->base + EIP93_REG_PE_BUF_THRESH); in eip93_initialize()
325 eip93_irq_clear(eip93, EIP93_INT_ALL); in eip93_initialize()
326 eip93_irq_disable(eip93, EIP93_INT_ALL); in eip93_initialize()
335 writel(val, eip93->base + EIP93_REG_PE_RING_THRESH); in eip93_initialize()
338 static void eip93_desc_free(struct eip93_device *eip93) in eip93_desc_free() argument
340 writel(0, eip93->base + EIP93_REG_PE_RING_CONFIG); in eip93_desc_free()
341 writel(0, eip93->base + EIP93_REG_PE_CDR_BASE); in eip93_desc_free()
342 writel(0, eip93->base + EIP93_REG_PE_RDR_BASE); in eip93_desc_free()
345 static int eip93_set_ring(struct eip93_device *eip93, struct eip93_desc_ring *ring) in eip93_set_ring() argument
348 ring->base = dmam_alloc_coherent(eip93->dev, in eip93_set_ring()
361 static int eip93_desc_init(struct eip93_device *eip93) in eip93_desc_init() argument
363 struct eip93_desc_ring *cdr = &eip93->ring->cdr; in eip93_desc_init()
364 struct eip93_desc_ring *rdr = &eip93->ring->rdr; in eip93_desc_init()
368 ret = eip93_set_ring(eip93, cdr); in eip93_desc_init()
372 ret = eip93_set_ring(eip93, rdr); in eip93_desc_init()
376 writel((u32 __force)cdr->base_dma, eip93->base + EIP93_REG_PE_CDR_BASE); in eip93_desc_init()
377 writel((u32 __force)rdr->base_dma, eip93->base + EIP93_REG_PE_RDR_BASE); in eip93_desc_init()
380 writel(val, eip93->base + EIP93_REG_PE_RING_CONFIG); in eip93_desc_init()
385 static void eip93_cleanup(struct eip93_device *eip93) in eip93_cleanup() argument
387 tasklet_kill(&eip93->ring->done_task); in eip93_cleanup()
390 eip93_irq_clear(eip93, EIP93_INT_ALL); in eip93_cleanup()
391 eip93_irq_disable(eip93, EIP93_INT_ALL); in eip93_cleanup()
393 writel(0, eip93->base + EIP93_REG_PE_CLOCK_CTRL); in eip93_cleanup()
395 eip93_desc_free(eip93); in eip93_cleanup()
397 idr_destroy(&eip93->ring->crypto_async_idr); in eip93_cleanup()
403 struct eip93_device *eip93; in eip93_crypto_probe() local
407 eip93 = devm_kzalloc(dev, sizeof(*eip93), GFP_KERNEL); in eip93_crypto_probe()
408 if (!eip93) in eip93_crypto_probe()
411 eip93->dev = dev; in eip93_crypto_probe()
412 platform_set_drvdata(pdev, eip93); in eip93_crypto_probe()
414 eip93->base = devm_platform_ioremap_resource(pdev, 0); in eip93_crypto_probe()
415 if (IS_ERR(eip93->base)) in eip93_crypto_probe()
416 return PTR_ERR(eip93->base); in eip93_crypto_probe()
418 eip93->irq = platform_get_irq(pdev, 0); in eip93_crypto_probe()
419 if (eip93->irq < 0) in eip93_crypto_probe()
420 return eip93->irq; in eip93_crypto_probe()
422 ret = devm_request_threaded_irq(eip93->dev, eip93->irq, eip93_irq_handler, in eip93_crypto_probe()
424 dev_name(eip93->dev), eip93); in eip93_crypto_probe()
426 eip93->ring = devm_kcalloc(eip93->dev, 1, sizeof(*eip93->ring), GFP_KERNEL); in eip93_crypto_probe()
427 if (!eip93->ring) in eip93_crypto_probe()
430 ret = eip93_desc_init(eip93); in eip93_crypto_probe()
435 tasklet_init(&eip93->ring->done_task, eip93_done_task, (unsigned long)eip93); in eip93_crypto_probe()
437 spin_lock_init(&eip93->ring->read_lock); in eip93_crypto_probe()
438 spin_lock_init(&eip93->ring->write_lock); in eip93_crypto_probe()
440 spin_lock_init(&eip93->ring->idr_lock); in eip93_crypto_probe()
441 idr_init(&eip93->ring->crypto_async_idr); in eip93_crypto_probe()
443 algo_flags = readl(eip93->base + EIP93_REG_PE_OPTION_1); in eip93_crypto_probe()
445 eip93_initialize(eip93, algo_flags); in eip93_crypto_probe()
448 eip93_irq_enable(eip93, EIP93_INT_RDR_THRESH); in eip93_crypto_probe()
450 ret = eip93_register_algs(eip93, algo_flags); in eip93_crypto_probe()
452 eip93_cleanup(eip93); in eip93_crypto_probe()
456 ver = readl(eip93->base + EIP93_REG_PE_REVISION); in eip93_crypto_probe()
458 dev_info(eip93->dev, "EIP%lu:%lx:%lx:%lx,PE(0x%x:0x%x)\n", in eip93_crypto_probe()
464 readl(eip93->base + EIP93_REG_PE_OPTION_0)); in eip93_crypto_probe()
471 struct eip93_device *eip93 = platform_get_drvdata(pdev); in eip93_crypto_remove() local
474 eip93_cleanup(eip93); in eip93_crypto_remove()