Lines Matching refs:base_reg
207 iowrite32(0x7FF, aes_dev->base_reg + AES_BYTE_ORDER_CFG_OFFSET); in aes_a_set_endianness()
213 iowrite32(AES_ACTIVE_TRIGGER, aes_dev->base_reg + AES_ACTIVE_OFFSET); in aes_a_op_trigger()
220 aes_dev->base_reg + AES_ACTIVE_OFFSET); in aes_a_op_termination()
235 aes_dev->base_reg + AES_ACTIVE_OFFSET); in aes_a_set_last_gcx()
244 aes_active_reg = ioread32(aes_dev->base_reg + in aes_a_wait_last_gcx()
255 reg = ioread32(aes_dev->base_reg + AES_A_DMA_STATUS_OFFSET); in aes_a_dma_wait_input_buffer_occupancy()
269 aes_dev->base_reg + AES_ACTIVE_OFFSET); in aes_a_set_last_gcx_and_adata()
275 iowrite32(0, aes_dev->base_reg + AES_A_DMA_SRC_SIZE_OFFSET); in aes_a_dma_set_xfer_size_zero()
276 iowrite32(0, aes_dev->base_reg + AES_A_DMA_DST_SIZE_OFFSET); in aes_a_dma_set_xfer_size_zero()
283 aes_dev->base_reg + AES_A_DMA_DMA_MODE_OFFSET); in aes_a_dma_active()
291 aes_dev->base_reg + AES_A_DMA_DMA_MODE_OFFSET); in aes_a_dma_active_src_ll_en()
299 aes_dev->base_reg + AES_A_DMA_DMA_MODE_OFFSET); in aes_a_dma_active_dst_ll_en()
308 aes_dev->base_reg + AES_A_DMA_DMA_MODE_OFFSET); in aes_a_dma_active_src_dst_ll_en()
314 iowrite32(0x00000000, aes_dev->base_reg + AES_A_DMA_PERF_CNTR_OFFSET); in aes_a_dma_reset_and_activate_perf_cntr()
316 aes_dev->base_reg + AES_A_DMA_WHILE_ACTIVE_MODE_OFFSET); in aes_a_dma_reset_and_activate_perf_cntr()
323 while (ioread32(aes_dev->base_reg + AES_A_DMA_PERF_CNTR_OFFSET) < delay) in aes_a_dma_wait_and_deactivate_perf_cntr()
326 aes_dev->base_reg + AES_A_DMA_WHILE_ACTIVE_MODE_OFFSET); in aes_a_dma_wait_and_deactivate_perf_cntr()
336 aes_dev->base_reg + AES_A_DMA_MSI_IER_OFFSET); in aes_irq_disable()
337 iowrite32(AES_DISABLE_INT, aes_dev->base_reg + AES_IER_OFFSET); in aes_irq_disable()
340 isr_val = ioread32(aes_dev->base_reg + AES_A_DMA_MSI_ISR_OFFSET); in aes_irq_disable()
343 aes_dev->base_reg + AES_A_DMA_MSI_ISR_OFFSET); in aes_irq_disable()
345 isr_val = ioread32(aes_dev->base_reg + AES_A_DMA_MSI_MASK_OFFSET); in aes_irq_disable()
348 aes_dev->base_reg + AES_A_DMA_MSI_MASK_OFFSET); in aes_irq_disable()
350 isr_val = ioread32(aes_dev->base_reg + AES_ISR_OFFSET); in aes_irq_disable()
352 iowrite32(isr_val, aes_dev->base_reg + AES_ISR_OFFSET); in aes_irq_disable()
367 aes_dev->base_reg + AES_A_DMA_MSI_IER_OFFSET); in aes_irq_enable()
376 iowrite32(AES_COMPLETE_INT, aes_dev->base_reg + AES_IER_OFFSET); in aes_irq_enable()
381 iowrite32(AES_DISABLE_INT, aes_dev->base_reg + AES_IER_OFFSET); in aes_irq_enable()
404 aes_dev->base_reg + AES_A_DMA_MSI_IER_OFFSET); in aes_irq_enable()
426 iowrite32(0, aes_dev->base_reg + AES_A_DMA_SRC_SIZE_OFFSET); in dma_to_ocs_aes_ll()
428 aes_dev->base_reg + AES_A_DMA_NEXT_SRC_DESCR_OFFSET); in dma_to_ocs_aes_ll()
435 iowrite32(0, aes_dev->base_reg + AES_A_DMA_DST_SIZE_OFFSET); in dma_from_ocs_aes_ll()
437 aes_dev->base_reg + AES_A_DMA_NEXT_DST_DESCR_OFFSET); in dma_from_ocs_aes_ll()
446 aes_dma_isr = ioread32(aes_dev->base_reg + AES_A_DMA_MSI_ISR_OFFSET); in ocs_aes_irq_handler()
508 aes_dev->base_reg + AES_KEY_0_OFFSET + in ocs_aes_set_key()
519 iowrite32(val, aes_dev->base_reg + AES_KEY_SIZE_OFFSET); in ocs_aes_set_key()
557 iowrite32(val, aes_dev->base_reg + AES_COMMAND_OFFSET); in set_ocs_aes_command()
594 iowrite32(val, aes_dev->base_reg + AES_PLEN_OFFSET); in ocs_aes_write_last_data_blk_len()
834 iowrite32(iv32[0], aes_dev->base_reg + AES_IV_0_OFFSET); in ocs_aes_op()
835 iowrite32(iv32[1], aes_dev->base_reg + AES_IV_1_OFFSET); in ocs_aes_op()
836 iowrite32(iv32[2], aes_dev->base_reg + AES_IV_2_OFFSET); in ocs_aes_op()
837 iowrite32(iv32[3], aes_dev->base_reg + AES_IV_3_OFFSET); in ocs_aes_op()
866 iv32[0] = ioread32(aes_dev->base_reg + AES_IV_0_OFFSET); in ocs_aes_op()
867 iv32[1] = ioread32(aes_dev->base_reg + AES_IV_1_OFFSET); in ocs_aes_op()
868 iv32[2] = ioread32(aes_dev->base_reg + AES_IV_2_OFFSET); in ocs_aes_op()
869 iv32[3] = ioread32(aes_dev->base_reg + AES_IV_3_OFFSET); in ocs_aes_op()
885 iowrite32(0x00000001, aes_dev->base_reg + AES_IV_0_OFFSET); in ocs_aes_gcm_write_j0()
886 iowrite32(__swab32(j0[2]), aes_dev->base_reg + AES_IV_1_OFFSET); in ocs_aes_gcm_write_j0()
887 iowrite32(__swab32(j0[1]), aes_dev->base_reg + AES_IV_2_OFFSET); in ocs_aes_gcm_write_j0()
888 iowrite32(__swab32(j0[0]), aes_dev->base_reg + AES_IV_3_OFFSET); in ocs_aes_gcm_write_j0()
902 tag_u32[0] = __swab32(ioread32(aes_dev->base_reg + AES_T_MAC_3_OFFSET)); in ocs_aes_gcm_read_tag()
903 tag_u32[1] = __swab32(ioread32(aes_dev->base_reg + AES_T_MAC_2_OFFSET)); in ocs_aes_gcm_read_tag()
904 tag_u32[2] = __swab32(ioread32(aes_dev->base_reg + AES_T_MAC_1_OFFSET)); in ocs_aes_gcm_read_tag()
905 tag_u32[3] = __swab32(ioread32(aes_dev->base_reg + AES_T_MAC_0_OFFSET)); in ocs_aes_gcm_read_tag()
956 iowrite32(tag_size, aes_dev->base_reg + AES_TLEN_OFFSET); in ocs_aes_gcm_op()
964 iowrite32(val, aes_dev->base_reg + AES_MULTIPURPOSE2_0_OFFSET); in ocs_aes_gcm_op()
966 iowrite32(val, aes_dev->base_reg + AES_MULTIPURPOSE2_1_OFFSET); in ocs_aes_gcm_op()
971 iowrite32(val, aes_dev->base_reg + AES_MULTIPURPOSE2_2_OFFSET); in ocs_aes_gcm_op()
973 iowrite32(val, aes_dev->base_reg + AES_MULTIPURPOSE2_3_OFFSET); in ocs_aes_gcm_op()
1043 iowrite8(in_tag[i], aes_dev->base_reg + in ocs_aes_ccm_write_encrypted_tag()
1115 iowrite8(b0[i], aes_dev->base_reg + in ocs_aes_ccm_write_b0()
1156 aes_dev->base_reg + in ocs_aes_ccm_write_adata_len()
1279 tag[i] = ioread32(aes_dev->base_reg + in ccm_compare_tag_to_yr()
1281 yr[i] = ioread32(aes_dev->base_reg + in ccm_compare_tag_to_yr()
1346 aes_dev->base_reg + AES_MULTIPURPOSE1_3_OFFSET); in ocs_aes_ccm_op()
1348 aes_dev->base_reg + AES_MULTIPURPOSE1_2_OFFSET); in ocs_aes_ccm_op()
1350 aes_dev->base_reg + AES_MULTIPURPOSE1_1_OFFSET); in ocs_aes_ccm_op()
1352 aes_dev->base_reg + AES_MULTIPURPOSE1_0_OFFSET); in ocs_aes_ccm_op()
1355 iowrite32(tag_size, aes_dev->base_reg + AES_TLEN_OFFSET); in ocs_aes_ccm_op()