Lines Matching refs:coord
16 struct access_coordinate coord[ACCESS_COORDINATE_MAX]; member
90 static void __cxl_access_coordinate_set(struct access_coordinate *coord, in __cxl_access_coordinate_set() argument
95 coord->read_latency = val; in __cxl_access_coordinate_set()
96 coord->write_latency = val; in __cxl_access_coordinate_set()
99 coord->read_latency = val; in __cxl_access_coordinate_set()
102 coord->write_latency = val; in __cxl_access_coordinate_set()
105 coord->read_bandwidth = val; in __cxl_access_coordinate_set()
106 coord->write_bandwidth = val; in __cxl_access_coordinate_set()
109 coord->read_bandwidth = val; in __cxl_access_coordinate_set()
112 coord->write_bandwidth = val; in __cxl_access_coordinate_set()
117 static void cxl_access_coordinate_set(struct access_coordinate *coord, in cxl_access_coordinate_set() argument
121 __cxl_access_coordinate_set(&coord[i], access, val); in cxl_access_coordinate_set()
222 cxl_coordinates_combine(dent->coord, dent->cdat_coord, ep_c); in cxl_port_perf_data_calculate()
225 &dent->coord[ACCESS_COORDINATE_CPU], in cxl_port_perf_data_calculate()
244 dpa_perf->coord[i] = dent->coord[i]; in update_perf_entry()
252 dent->coord[ACCESS_COORDINATE_CPU].read_bandwidth, in update_perf_entry()
253 dent->coord[ACCESS_COORDINATE_CPU].write_bandwidth, in update_perf_entry()
254 dent->coord[ACCESS_COORDINATE_CPU].read_latency, in update_perf_entry()
255 dent->coord[ACCESS_COORDINATE_CPU].write_latency); in update_perf_entry()
505 cxl_access_coordinate_set(dport->coord, in cdat_sslbis_handler()
562 static void cxl_bandwidth_add(struct access_coordinate *coord, in cxl_bandwidth_add() argument
567 coord[i].read_bandwidth = c1[i].read_bandwidth + in cxl_bandwidth_add()
569 coord[i].write_bandwidth = c1[i].write_bandwidth + in cxl_bandwidth_add()
609 struct access_coordinate coord[ACCESS_COORDINATE_MAX]; member
721 cxl_bandwidth_add(perf_ctx->coord, perf_ctx->coord, ep_coord); in cxl_endpoint_gather_bandwidth()
829 cxl_coordinates_combine(coords, coords, ctx->coord); in DEFINE_FREE()
836 cxl_coordinates_combine(coords, coords, dport->coord); in DEFINE_FREE()
842 cxl_bandwidth_add(us_ctx->coord, us_ctx->coord, coords); in DEFINE_FREE()
896 cxl_bandwidth_add(hb_ctx->coord, hb_ctx->coord, ctx->coord); in cxl_rp_gather_bandwidth()
945 cxl_coordinates_combine(ctx->coord, ctx->coord, dport->coord); in cxl_hb_gather_bandwidth()
946 cxl_bandwidth_add(mw_ctx->coord, mw_ctx->coord, ctx->coord); in cxl_hb_gather_bandwidth()
960 struct access_coordinate coord[ACCESS_COORDINATE_MAX]; in cxl_region_update_bandwidth() local
964 memset(coord, 0, sizeof(coord)); in cxl_region_update_bandwidth()
966 cxl_bandwidth_add(coord, coord, ctx->coord); in cxl_region_update_bandwidth()
969 cxlr->coord[i].read_bandwidth = coord[i].read_bandwidth; in cxl_region_update_bandwidth()
970 cxlr->coord[i].write_bandwidth = coord[i].write_bandwidth; in cxl_region_update_bandwidth()
1068 cxlr->coord[i].read_latency = max_t(unsigned int, in cxl_region_perf_data_calculate()
1069 cxlr->coord[i].read_latency, in cxl_region_perf_data_calculate()
1070 perf->coord[i].read_latency); in cxl_region_perf_data_calculate()
1071 cxlr->coord[i].write_latency = max_t(unsigned int, in cxl_region_perf_data_calculate()
1072 cxlr->coord[i].write_latency, in cxl_region_perf_data_calculate()
1073 perf->coord[i].write_latency); in cxl_region_perf_data_calculate()
1074 cxlr->coord[i].read_bandwidth += perf->coord[i].read_bandwidth; in cxl_region_perf_data_calculate()
1075 cxlr->coord[i].write_bandwidth += perf->coord[i].write_bandwidth; in cxl_region_perf_data_calculate()
1082 return hmat_update_target_coordinates(nid, &cxlr->coord[access], access); in cxl_update_hmat_access_coordinates()