Lines Matching refs:perf
277 &cxlds->part[i].perf); in cxl_memdev_set_qos_class()
375 struct cxl_dpa_perf *perf = &cxlds->part[i].perf; in cxl_qos_class_verify() local
377 reset_dpa_perf(perf); in cxl_qos_class_verify()
383 struct cxl_dpa_perf *perf = &cxlds->part[i].perf; in cxl_qos_class_verify() local
385 if (!cxl_qos_match(root_port, perf)) in cxl_qos_class_verify()
386 reset_dpa_perf(perf); in cxl_qos_class_verify()
574 static bool dpa_perf_contains(struct cxl_dpa_perf *perf, in dpa_perf_contains() argument
582 return range_contains(&perf->dpa_range, &dpa); in dpa_perf_contains()
589 struct cxl_dpa_perf *perf; in cxled_get_dpa_perf() local
593 perf = &cxlds->part[cxled->part].perf; in cxled_get_dpa_perf()
595 if (!perf) in cxled_get_dpa_perf()
598 if (!dpa_perf_contains(perf, cxled->dpa_res)) in cxled_get_dpa_perf()
601 return perf; in cxled_get_dpa_perf()
646 struct cxl_dpa_perf *perf; in cxl_endpoint_gather_bandwidth() local
657 perf = cxled_get_dpa_perf(cxled); in cxl_endpoint_gather_bandwidth()
658 if (IS_ERR(perf)) in cxl_endpoint_gather_bandwidth()
659 return PTR_ERR(perf); in cxl_endpoint_gather_bandwidth()
695 cxl_coordinates_combine(ep_coord, pci_coord, perf->cdat_coord); in cxl_endpoint_gather_bandwidth()
1058 struct cxl_dpa_perf *perf; in cxl_region_perf_data_calculate() local
1062 perf = cxled_get_dpa_perf(cxled); in cxl_region_perf_data_calculate()
1063 if (IS_ERR(perf)) in cxl_region_perf_data_calculate()
1070 perf->coord[i].read_latency); in cxl_region_perf_data_calculate()
1073 perf->coord[i].write_latency); in cxl_region_perf_data_calculate()
1074 cxlr->coord[i].read_bandwidth += perf->coord[i].read_bandwidth; in cxl_region_perf_data_calculate()
1075 cxlr->coord[i].write_bandwidth += perf->coord[i].write_bandwidth; in cxl_region_perf_data_calculate()