Lines Matching refs:ccr
271 u32 ccr; member
423 swdesc->ccr = 0; in stm32_dma3_chan_desc_alloc()
430 swdesc->ccr &= ~CCR_LAP; in stm32_dma3_chan_desc_alloc()
563 u32 *ccr, u32 *ctr1, u32 *ctr2, in stm32_dma3_chan_prep_hw() argument
754 *ccr |= FIELD_PREP(CCR_PRIO, FIELD_GET(STM32_DMA3_DT_PRIO, ch_conf)); in stm32_dma3_chan_prep_hw()
770 u32 csr, ccr; in stm32_dma3_chan_start() local
784 writel_relaxed(chan->swdesc->ccr, ddata->base + STM32_DMA3_CCR(id)); in stm32_dma3_chan_start()
799 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(id)); in stm32_dma3_chan_start()
800 writel_relaxed(ccr | CCR_EN, ddata->base + STM32_DMA3_CCR(id)); in stm32_dma3_chan_start()
810 u32 csr, ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN; in stm32_dma3_chan_suspend() local
814 ccr |= CCR_SUSP; in stm32_dma3_chan_suspend()
816 ccr &= ~CCR_SUSP; in stm32_dma3_chan_suspend()
818 writel_relaxed(ccr, ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_suspend()
835 u32 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN; in stm32_dma3_chan_reset() local
837 writel_relaxed(ccr |= CCR_RESET, ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_reset()
877 writel_relaxed(swdesc->ccr | CCR_SUSP, ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_set_residue()
883 writel_relaxed(swdesc->ccr, ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_set_residue()
908 writel_relaxed(swdesc->ccr, ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_set_residue()
971 u32 ccr; in stm32_dma3_chan_stop() local
977 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_stop()
978 writel_relaxed(ccr & ~(CCR_ALLIE | CCR_EN), ddata->base + STM32_DMA3_CCR(chan->id)); in stm32_dma3_chan_stop()
980 if (!(ccr & CCR_SUSP) && (ccr & CCR_EN)) { in stm32_dma3_chan_stop()
1010 u32 misr, csr, ccr; in stm32_dma3_chan_irq() local
1021 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & CCR_ALLIE; in stm32_dma3_chan_irq()
1023 if (csr & CSR_TCF && ccr & CCR_TCIE) { in stm32_dma3_chan_irq()
1030 if (csr & CSR_USEF && ccr & CCR_USEIE) { in stm32_dma3_chan_irq()
1038 if (csr & CSR_ULEF && ccr & CCR_ULEIE) { in stm32_dma3_chan_irq()
1045 if (csr & CSR_DTEF && ccr & CCR_DTEIE) { in stm32_dma3_chan_irq()
1056 csr &= (ccr | CCR_HTIE); in stm32_dma3_chan_irq()
1227 ret = stm32_dma3_chan_prep_hw(chan, DMA_MEM_TO_MEM, &swdesc->ccr, &ctr1, &ctr2, in stm32_dma3_prep_dma_memcpy()
1237 swdesc->ccr |= CCR_USEIE | CCR_ULEIE | CCR_DTEIE; in stm32_dma3_prep_dma_memcpy()
1239 swdesc->ccr |= CCR_TCIE; in stm32_dma3_prep_dma_memcpy()
1294 ret = stm32_dma3_chan_prep_hw(chan, dir, &swdesc->ccr, &ctr1, &ctr2, in stm32_dma3_prep_slave_sg()
1303 ret = stm32_dma3_chan_prep_hw(chan, dir, &swdesc->ccr, &ctr1, &ctr2, in stm32_dma3_prep_slave_sg()
1327 swdesc->ccr |= CCR_USEIE | CCR_ULEIE | CCR_DTEIE; in stm32_dma3_prep_slave_sg()
1329 swdesc->ccr |= CCR_TCIE; in stm32_dma3_prep_slave_sg()
1372 ret = stm32_dma3_chan_prep_hw(chan, DMA_MEM_TO_DEV, &swdesc->ccr, &ctr1, &ctr2, in stm32_dma3_prep_dma_cyclic()
1378 ret = stm32_dma3_chan_prep_hw(chan, DMA_DEV_TO_MEM, &swdesc->ccr, &ctr1, &ctr2, in stm32_dma3_prep_dma_cyclic()
1402 swdesc->ccr |= CCR_USEIE | CCR_ULEIE | CCR_DTEIE; in stm32_dma3_prep_dma_cyclic()
1404 swdesc->ccr |= CCR_TCIE; in stm32_dma3_prep_dma_cyclic()