Lines Matching refs:extack
111 struct netlink_ext_ack *extack) in dpll_msg_add_mode() argument
117 ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack); in dpll_msg_add_mode()
128 struct netlink_ext_ack *extack) in dpll_msg_add_mode_supported() argument
138 ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack); in dpll_msg_add_mode_supported()
149 struct netlink_ext_ack *extack) in dpll_msg_add_phase_offset_monitor() argument
157 &state, extack); in dpll_msg_add_phase_offset_monitor()
169 struct netlink_ext_ack *extack) in dpll_msg_add_lock_status() argument
177 &status_error, extack); in dpll_msg_add_lock_status()
193 struct netlink_ext_ack *extack) in dpll_msg_add_temp() argument
201 ret = ops->temp_get(dpll, dpll_priv(dpll), &temp, extack); in dpll_msg_add_temp()
212 struct netlink_ext_ack *extack) in dpll_msg_add_clock_quality_level() argument
221 ret = ops->clock_quality_level_get(dpll, dpll_priv(dpll), qls, extack); in dpll_msg_add_clock_quality_level()
234 struct netlink_ext_ack *extack) in dpll_msg_add_pin_prio() argument
244 dpll_priv(dpll), &prio, extack); in dpll_msg_add_pin_prio()
256 struct netlink_ext_ack *extack) in dpll_msg_add_pin_on_dpll_state() argument
266 dpll, dpll_priv(dpll), &state, extack); in dpll_msg_add_pin_on_dpll_state()
278 struct netlink_ext_ack *extack) in dpll_msg_add_pin_direction() argument
286 dpll_priv(dpll), &direction, extack); in dpll_msg_add_pin_direction()
298 struct netlink_ext_ack *extack) in dpll_msg_add_pin_phase_adjust() argument
309 &phase_adjust, extack); in dpll_msg_add_pin_phase_adjust()
321 struct netlink_ext_ack *extack) in dpll_msg_add_phase_offset() argument
332 extack); in dpll_msg_add_phase_offset()
344 struct netlink_ext_ack *extack) in dpll_msg_add_ffo() argument
354 dpll, dpll_priv(dpll), &ffo, extack); in dpll_msg_add_ffo()
365 struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) in dpll_msg_add_pin_freq() argument
376 dpll_priv(dpll), &freq, extack); in dpll_msg_add_pin_freq()
406 struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) in dpll_msg_add_pin_esync() argument
417 dpll_priv(dpll), &esync, extack); in dpll_msg_add_pin_esync()
452 struct netlink_ext_ack *extack) in dpll_msg_add_pin_ref_sync() argument
471 ref_sync_pin_priv, &state, extack); in dpll_msg_add_pin_ref_sync()
504 struct netlink_ext_ack *extack) in dpll_msg_add_pin_parents() argument
521 ppin, parent_priv, &state, extack); in dpll_msg_add_pin_parents()
546 struct netlink_ext_ack *extack) in dpll_msg_add_pin_dplls() argument
560 ret = dpll_msg_add_pin_on_dpll_state(msg, pin, ref, extack); in dpll_msg_add_pin_dplls()
563 ret = dpll_msg_add_pin_prio(msg, pin, ref, extack); in dpll_msg_add_pin_dplls()
566 ret = dpll_msg_add_pin_direction(msg, pin, ref, extack); in dpll_msg_add_pin_dplls()
569 ret = dpll_msg_add_phase_offset(msg, pin, ref, extack); in dpll_msg_add_pin_dplls()
584 struct netlink_ext_ack *extack) in dpll_cmd_pin_get_one() argument
616 ret = dpll_msg_add_pin_freq(msg, pin, ref, extack); in dpll_cmd_pin_get_one()
625 ret = dpll_msg_add_pin_phase_adjust(msg, pin, ref, extack); in dpll_cmd_pin_get_one()
628 ret = dpll_msg_add_ffo(msg, pin, ref, extack); in dpll_cmd_pin_get_one()
631 ret = dpll_msg_add_pin_esync(msg, pin, ref, extack); in dpll_cmd_pin_get_one()
635 ret = dpll_msg_add_pin_ref_sync(msg, pin, ref, extack); in dpll_cmd_pin_get_one()
639 ret = dpll_msg_add_pin_dplls(msg, pin, extack); in dpll_cmd_pin_get_one()
641 ret = dpll_msg_add_pin_parents(msg, pin, ref, extack); in dpll_cmd_pin_get_one()
648 struct netlink_ext_ack *extack) in dpll_device_get_one() argument
660 ret = dpll_msg_add_temp(msg, dpll, extack); in dpll_device_get_one()
663 ret = dpll_msg_add_lock_status(msg, dpll, extack); in dpll_device_get_one()
666 ret = dpll_msg_add_clock_quality_level(msg, dpll, extack); in dpll_device_get_one()
669 ret = dpll_msg_add_mode(msg, dpll, extack); in dpll_device_get_one()
672 ret = dpll_msg_add_mode_supported(msg, dpll, extack); in dpll_device_get_one()
677 ret = dpll_msg_add_phase_offset_monitor(msg, dpll, extack); in dpll_device_get_one()
819 struct netlink_ext_ack *extack) in dpll_phase_offset_monitor_set() argument
826 NL_SET_ERR_MSG_ATTR(extack, a, "dpll device not capable of phase offset monitor"); in dpll_phase_offset_monitor_set()
830 extack); in dpll_phase_offset_monitor_set()
832 NL_SET_ERR_MSG(extack, "unable to get current state of phase offset monitor"); in dpll_phase_offset_monitor_set()
839 extack); in dpll_phase_offset_monitor_set()
844 struct netlink_ext_ack *extack) in dpll_pin_freq_set() argument
854 NL_SET_ERR_MSG_ATTR(extack, a, "frequency is not supported by the device"); in dpll_pin_freq_set()
861 NL_SET_ERR_MSG(extack, "frequency set not supported by the device"); in dpll_pin_freq_set()
869 dpll_priv(dpll), &old_freq, extack); in dpll_pin_freq_set()
871 NL_SET_ERR_MSG(extack, "unable to get old frequency value"); in dpll_pin_freq_set()
881 dpll, dpll_priv(dpll), freq, extack); in dpll_pin_freq_set()
884 NL_SET_ERR_MSG_FMT(extack, "frequency set failed for dpll_id:%u", in dpll_pin_freq_set()
900 dpll, dpll_priv(dpll), old_freq, extack)) in dpll_pin_freq_set()
901 NL_SET_ERR_MSG(extack, "set frequency rollback failed"); in dpll_pin_freq_set()
908 struct netlink_ext_ack *extack) in dpll_pin_esync_set() argument
922 NL_SET_ERR_MSG(extack, in dpll_pin_esync_set()
931 dpll_priv(dpll), &esync, extack); in dpll_pin_esync_set()
933 NL_SET_ERR_MSG(extack, "unable to get current embedded sync frequency value"); in dpll_pin_esync_set()
942 NL_SET_ERR_MSG_ATTR(extack, a, in dpll_pin_esync_set()
954 freq, extack); in dpll_pin_esync_set()
957 NL_SET_ERR_MSG_FMT(extack, in dpll_pin_esync_set()
977 esync.freq, extack)) in dpll_pin_esync_set()
978 NL_SET_ERR_MSG(extack, "set embedded sync frequency rollback failed"); in dpll_pin_esync_set()
987 struct netlink_ext_ack *extack) in dpll_pin_ref_sync_state_set() argument
1001 NL_SET_ERR_MSG(extack, "reference sync pin not found"); in dpll_pin_ref_sync_state_set()
1005 NL_SET_ERR_MSG(extack, "reference sync pin not available"); in dpll_pin_ref_sync_state_set()
1012 NL_SET_ERR_MSG(extack, "reference sync not supported by this pin"); in dpll_pin_ref_sync_state_set()
1019 &old_state, extack); in dpll_pin_ref_sync_state_set()
1021 NL_SET_ERR_MSG(extack, "unable to get old reference sync state"); in dpll_pin_ref_sync_state_set()
1033 state, extack); in dpll_pin_ref_sync_state_set()
1036 NL_SET_ERR_MSG_FMT(extack, "reference sync set failed for dpll_id:%u", in dpll_pin_ref_sync_state_set()
1054 old_state, extack)) in dpll_pin_ref_sync_state_set()
1055 NL_SET_ERR_MSG(extack, "set reference sync rollback failed"); in dpll_pin_ref_sync_state_set()
1062 struct netlink_ext_ack *extack) in dpll_pin_ref_sync_set() argument
1069 dpll_reference_sync_nl_policy, extack); in dpll_pin_ref_sync_set()
1071 NL_SET_ERR_MSG(extack, "sync pin id expected"); in dpll_pin_ref_sync_set()
1077 NL_SET_ERR_MSG(extack, "sync pin state expected"); in dpll_pin_ref_sync_set()
1082 return dpll_pin_ref_sync_state_set(pin, sync_pin_id, state, extack); in dpll_pin_ref_sync_set()
1088 struct netlink_ext_ack *extack) in dpll_pin_on_pin_state_set() argument
1100 NL_SET_ERR_MSG(extack, "state changing is not allowed"); in dpll_pin_on_pin_state_set()
1116 state, extack); in dpll_pin_on_pin_state_set()
1128 struct netlink_ext_ack *extack) in dpll_pin_state_set() argument
1136 NL_SET_ERR_MSG(extack, "state changing is not allowed"); in dpll_pin_state_set()
1145 dpll, dpll_priv(dpll), state, extack); in dpll_pin_state_set()
1155 u32 prio, struct netlink_ext_ack *extack) in dpll_pin_prio_set() argument
1163 NL_SET_ERR_MSG(extack, "prio changing is not allowed"); in dpll_pin_prio_set()
1172 dpll_priv(dpll), prio, extack); in dpll_pin_prio_set()
1183 struct netlink_ext_ack *extack) in dpll_pin_direction_set() argument
1191 NL_SET_ERR_MSG(extack, "direction changing is not allowed"); in dpll_pin_direction_set()
1200 dpll, dpll_priv(dpll), direction, extack); in dpll_pin_direction_set()
1210 struct netlink_ext_ack *extack) in dpll_pin_phase_adj_set() argument
1222 NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr, in dpll_pin_phase_adj_set()
1230 NL_SET_ERR_MSG(extack, "phase adjust not supported"); in dpll_pin_phase_adj_set()
1239 extack); in dpll_pin_phase_adj_set()
1241 NL_SET_ERR_MSG(extack, "unable to get old phase adjust value"); in dpll_pin_phase_adj_set()
1253 extack); in dpll_pin_phase_adj_set()
1256 NL_SET_ERR_MSG_FMT(extack, in dpll_pin_phase_adj_set()
1274 extack)) in dpll_pin_phase_adj_set()
1275 NL_SET_ERR_MSG(extack, "set phase adjust rollback failed"); in dpll_pin_phase_adj_set()
1282 struct netlink_ext_ack *extack) in dpll_pin_parent_device_set() argument
1293 dpll_pin_parent_device_nl_policy, extack); in dpll_pin_parent_device_set()
1295 NL_SET_ERR_MSG(extack, "device parent id expected"); in dpll_pin_parent_device_set()
1301 NL_SET_ERR_MSG(extack, "parent device not found"); in dpll_pin_parent_device_set()
1306 NL_SET_ERR_MSG(extack, "pin not connected to given parent device"); in dpll_pin_parent_device_set()
1311 ret = dpll_pin_state_set(dpll, pin, state, extack); in dpll_pin_parent_device_set()
1317 ret = dpll_pin_prio_set(dpll, pin, prio, extack); in dpll_pin_parent_device_set()
1323 ret = dpll_pin_direction_set(pin, dpll, direction, extack); in dpll_pin_parent_device_set()
1332 struct netlink_ext_ack *extack) in dpll_pin_parent_pin_set() argument
1339 dpll_pin_parent_pin_nl_policy, extack); in dpll_pin_parent_pin_set()
1341 NL_SET_ERR_MSG(extack, "device parent id expected"); in dpll_pin_parent_pin_set()
1349 ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); in dpll_pin_parent_pin_set()
1367 ret = dpll_pin_freq_set(pin, a, info->extack); in dpll_pin_set_from_nlattr()
1372 ret = dpll_pin_phase_adj_set(pin, a, info->extack); in dpll_pin_set_from_nlattr()
1377 ret = dpll_pin_parent_device_set(pin, a, info->extack); in dpll_pin_set_from_nlattr()
1382 ret = dpll_pin_parent_pin_set(pin, a, info->extack); in dpll_pin_set_from_nlattr()
1387 ret = dpll_pin_esync_set(pin, a, info->extack); in dpll_pin_set_from_nlattr()
1392 ret = dpll_pin_ref_sync_set(pin, a, info->extack); in dpll_pin_set_from_nlattr()
1406 struct netlink_ext_ack *extack) in dpll_pin_find() argument
1433 NL_SET_ERR_MSG(extack, "multiple matches"); in dpll_pin_find()
1440 NL_SET_ERR_MSG(extack, "not found"); in dpll_pin_find()
1493 NL_SET_ERR_MSG(info->extack, "missing attributes"); in dpll_pin_find_from_nlattr()
1498 info->extack); in dpll_pin_find_from_nlattr()
1500 NL_SET_ERR_MSG(info->extack, "duplicated attribute"); in dpll_pin_find_from_nlattr()
1555 ret = dpll_cmd_pin_get_one(msg, pin, info->extack); in dpll_nl_pin_get_doit()
1586 ret = dpll_cmd_pin_get_one(skb, pin, cb->extack); in dpll_nl_pin_get_dumpit()
1611 enum dpll_type type, struct netlink_ext_ack *extack) in dpll_device_find() argument
1625 NL_SET_ERR_MSG(extack, "multiple matches"); in dpll_device_find()
1632 NL_SET_ERR_MSG(extack, "not found"); in dpll_device_find()
1670 NL_SET_ERR_MSG(info->extack, "missing attributes"); in dpll_device_find_from_nlattr()
1673 return dpll_device_find(clock_id, mod_name_attr, type, info->extack); in dpll_device_find_from_nlattr()
1675 NL_SET_ERR_MSG(info->extack, "duplicated attribute"); in dpll_device_find_from_nlattr()
1726 ret = dpll_device_get_one(dpll, msg, info->extack); in dpll_nl_device_get_doit()
1744 ret = dpll_phase_offset_monitor_set(dpll, a, info->extack); in dpll_set_from_nlattr()
1777 ret = dpll_device_get_one(dpll, skb, cb->extack); in dpll_nl_device_get_dumpit()
1805 NL_SET_ERR_MSG(info->extack, "device not found"); in dpll_pre_doit()
1850 NL_SET_ERR_MSG(info->extack, "pin not found"); in dpll_pin_pre_doit()