Lines Matching refs:csrow
374 static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct, in get_cs_base_and_mask() argument
381 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()
382 csmask = pvt->csels[dct].csmasks[csrow]; in get_cs_base_and_mask()
393 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()
394 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()
409 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()
410 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()
449 int csrow; in input_addr_to_csrow() local
454 for_each_chip_select(csrow, 0, pvt) { in input_addr_to_csrow()
455 if (!csrow_enabled(csrow, 0, pvt)) in input_addr_to_csrow()
458 get_cs_base_and_mask(pvt, csrow, 0, &base, &mask); in input_addr_to_csrow()
464 (unsigned long)input_addr, csrow, in input_addr_to_csrow()
467 return csrow; in input_addr_to_csrow()
970 int csrow; in sys_addr_to_csrow() local
972 csrow = input_addr_to_csrow(mci, sys_addr_to_input_addr(mci, sys_addr)); in sys_addr_to_csrow()
974 if (csrow == -1) in sys_addr_to_csrow()
977 return csrow; in sys_addr_to_csrow()
1807 err->csrow = sys_addr_to_csrow(err->src_mci, sys_addr); in k8_map_sysaddr_to_csrow()
1808 if (err->csrow < 0) { in k8_map_sysaddr_to_csrow()
2189 static int f10_process_possible_spare(struct amd64_pvt *pvt, u8 dct, int csrow) in f10_process_possible_spare() argument
2194 csrow == online_spare_bad_dramcs(pvt, dct)) { in f10_process_possible_spare()
2198 csrow = tmp_cs; in f10_process_possible_spare()
2203 return csrow; in f10_process_possible_spare()
2220 int csrow; in f1x_lookup_addr_in_dct() local
2230 for_each_chip_select(csrow, dct, pvt) { in f1x_lookup_addr_in_dct()
2231 if (!csrow_enabled(csrow, dct, pvt)) in f1x_lookup_addr_in_dct()
2234 get_cs_base_and_mask(pvt, csrow, dct, &cs_base, &cs_mask); in f1x_lookup_addr_in_dct()
2237 csrow, cs_base, cs_mask); in f1x_lookup_addr_in_dct()
2246 cs_found = csrow; in f1x_lookup_addr_in_dct()
2249 cs_found = f10_process_possible_spare(pvt, dct, csrow); in f1x_lookup_addr_in_dct()
2536 err->csrow = f1x_translate_sysaddr_to_cs(pvt, sys_addr, &err->channel); in f1x_map_sysaddr_to_csrow()
2537 if (err->csrow < 0) { in f1x_map_sysaddr_to_csrow()
2750 err->csrow, err->channel, -1, in __log_ecc_error()
2805 err->csrow = m->synd & 0x7; in umc_get_err_info()
3131 struct csrow_info *csrow; in dct_init_csrows() local
3158 csrow = mci->csrows[i]; in dct_init_csrows()
3165 csrow->channels[0]->dimm->nr_pages = nr_pages; in dct_init_csrows()
3172 csrow->channels[1]->dimm->nr_pages = row_dct1_pages; in dct_init_csrows()
3186 dimm = csrow->channels[j]->dimm; in dct_init_csrows()
3523 err->csrow = phy; in gpu_get_err_info()