Lines Matching refs:prot_err
25 const struct cxl_cper_sec_prot_err *prot_err) in cxl_cper_print_prot_err() argument
27 if (prot_err->valid_bits & PROT_ERR_VALID_AGENT_TYPE) in cxl_cper_print_prot_err()
28 pr_info("%s agent_type: %d, %s\n", pfx, prot_err->agent_type, in cxl_cper_print_prot_err()
29 prot_err->agent_type < ARRAY_SIZE(prot_err_agent_type_strs) in cxl_cper_print_prot_err()
30 ? prot_err_agent_type_strs[prot_err->agent_type] in cxl_cper_print_prot_err()
33 if (prot_err->valid_bits & PROT_ERR_VALID_AGENT_ADDRESS) { in cxl_cper_print_prot_err()
34 switch (prot_err->agent_type) { in cxl_cper_print_prot_err()
49 pfx, prot_err->agent_addr.segment, in cxl_cper_print_prot_err()
50 prot_err->agent_addr.bus, in cxl_cper_print_prot_err()
51 prot_err->agent_addr.device, in cxl_cper_print_prot_err()
52 prot_err->agent_addr.function); in cxl_cper_print_prot_err()
56 prot_err->agent_addr.rcrb_base_addr); in cxl_cper_print_prot_err()
63 if (prot_err->valid_bits & PROT_ERR_VALID_DEVICE_ID) { in cxl_cper_print_prot_err()
66 switch (prot_err->agent_type) { in cxl_cper_print_prot_err()
75 prot_err->device_id.slot >> CPER_PCIE_SLOT_SHIFT); in cxl_cper_print_prot_err()
77 pfx, prot_err->device_id.vendor_id, in cxl_cper_print_prot_err()
78 prot_err->device_id.device_id); in cxl_cper_print_prot_err()
80 pfx, prot_err->device_id.subsystem_vendor_id, in cxl_cper_print_prot_err()
81 prot_err->device_id.subsystem_id); in cxl_cper_print_prot_err()
82 class_code = prot_err->device_id.class_code; in cxl_cper_print_prot_err()
91 if (prot_err->valid_bits & PROT_ERR_VALID_SERIAL_NUMBER) { in cxl_cper_print_prot_err()
92 switch (prot_err->agent_type) { in cxl_cper_print_prot_err()
98 prot_err->dev_serial_num.lower_dw, in cxl_cper_print_prot_err()
99 prot_err->dev_serial_num.upper_dw); in cxl_cper_print_prot_err()
106 if (prot_err->valid_bits & PROT_ERR_VALID_CAPABILITY) { in cxl_cper_print_prot_err()
107 switch (prot_err->agent_type) { in cxl_cper_print_prot_err()
116 prot_err->capability, in cxl_cper_print_prot_err()
117 sizeof(prot_err->capability), 0); in cxl_cper_print_prot_err()
124 if (prot_err->valid_bits & PROT_ERR_VALID_DVSEC) { in cxl_cper_print_prot_err()
125 pr_info("%s DVSEC length: 0x%04x\n", pfx, prot_err->dvsec_len); in cxl_cper_print_prot_err()
128 print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, (prot_err + 1), in cxl_cper_print_prot_err()
129 prot_err->dvsec_len, 0); in cxl_cper_print_prot_err()
132 if (prot_err->valid_bits & PROT_ERR_VALID_ERROR_LOG) { in cxl_cper_print_prot_err()
133 size_t size = sizeof(*prot_err) + prot_err->dvsec_len; in cxl_cper_print_prot_err()
136 pr_info("%s Error log length: 0x%04x\n", pfx, prot_err->err_len); in cxl_cper_print_prot_err()
139 cxl_ras = (struct cxl_ras_capability_regs *)((long)prot_err + size); in cxl_cper_print_prot_err()