Lines Matching defs:amdgpu_device
938 struct amdgpu_device { struct
939 struct device *dev;
940 struct pci_dev *pdev;
941 struct drm_device ddev;
944 struct amdgpu_acp acp;
946 struct amdgpu_hive_info *hive;
947 struct amdgpu_xcp_mgr *xcp_mgr;
949 enum amd_asic_type asic_type;
950 uint32_t family;
951 uint32_t rev_id;
952 uint32_t external_rev_id;
953 unsigned long flags;
954 unsigned long apu_flags;
955 int usec_timeout;
956 const struct amdgpu_asic_funcs *asic_funcs;
957 bool shutdown;
958 bool need_swiotlb;
959 bool accel_working;
960 struct notifier_block acpi_nb;
961 struct notifier_block pm_nb;
962 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
963 struct debugfs_blob_wrapper debugfs_vbios_blob;
964 struct debugfs_blob_wrapper debugfs_discovery_blob;
965 struct mutex srbm_mutex;
967 struct mutex grbm_idx_mutex;
968 struct dev_pm_domain vga_pm_domain;
969 bool have_disp_power_ref;
970 bool have_atomics_support;
973 bool is_atom_fw;
974 uint8_t *bios;
975 uint32_t bios_size;
976 uint32_t bios_scratch_reg_offset;
977 uint32_t bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
980 resource_size_t rmmio_base;
981 resource_size_t rmmio_size;
982 void __iomem *rmmio;
984 spinlock_t mmio_idx_lock;
985 struct amdgpu_mmio_remap rmmio_remap;
987 spinlock_t smc_idx_lock;
988 amdgpu_rreg_t smc_rreg;
989 amdgpu_wreg_t smc_wreg;
991 spinlock_t pcie_idx_lock;
992 amdgpu_rreg_t pcie_rreg;
993 amdgpu_wreg_t pcie_wreg;
994 amdgpu_rreg_t pciep_rreg;
995 amdgpu_wreg_t pciep_wreg;
996 amdgpu_rreg_ext_t pcie_rreg_ext;
997 amdgpu_wreg_ext_t pcie_wreg_ext;
998 amdgpu_rreg64_t pcie_rreg64;
999 amdgpu_wreg64_t pcie_wreg64;
1000 amdgpu_rreg64_ext_t pcie_rreg64_ext;
1001 amdgpu_wreg64_ext_t pcie_wreg64_ext;
1003 spinlock_t uvd_ctx_idx_lock;
1004 amdgpu_rreg_t uvd_ctx_rreg;
1005 amdgpu_wreg_t uvd_ctx_wreg;
1007 spinlock_t didt_idx_lock;
1008 amdgpu_rreg_t didt_rreg;
1009 amdgpu_wreg_t didt_wreg;
1011 spinlock_t gc_cac_idx_lock;
1012 amdgpu_rreg_t gc_cac_rreg;
1013 amdgpu_wreg_t gc_cac_wreg;
1015 spinlock_t se_cac_idx_lock;
1016 amdgpu_rreg_t se_cac_rreg;
1017 amdgpu_wreg_t se_cac_wreg;
1019 spinlock_t audio_endpt_idx_lock;
1020 amdgpu_block_rreg_t audio_endpt_rreg;
1021 amdgpu_block_wreg_t audio_endpt_wreg;
1022 struct amdgpu_doorbell doorbell;
1025 struct amdgpu_clock clock;
1028 struct amdgpu_gmc gmc;
1029 struct amdgpu_gart gart;
1030 dma_addr_t dummy_page_addr;
1031 struct amdgpu_vm_manager vm_manager;
1032 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
1058 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */ argument
1059 struct delayed_work hotplug_work;
1060 struct amdgpu_irq_src crtc_irq;
1061 struct amdgpu_irq_src vline0_irq;
1062 struct amdgpu_irq_src vupdate_irq;
1063 struct amdgpu_irq_src pageflip_irq;
1064 struct amdgpu_irq_src hpd_irq;
1065 struct amdgpu_irq_src dmub_trace_irq;
1066 struct amdgpu_irq_src dmub_outbox_irq;
1069 u64 fence_context;
1070 unsigned num_rings;
1071 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
1072 struct dma_fence __rcu *gang_submit;
1073 bool ib_pool_ready;
1074 struct amdgpu_sa_manager ib_pools[AMDGPU_IB_POOL_MAX];
1075 struct amdgpu_sched gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
1078 struct amdgpu_irq irq;
1081 struct amd_powerplay powerplay;
1082 struct amdgpu_pm pm;
1083 u64 cg_flags;
1084 u32 pg_flags;
1087 struct amdgpu_nbio nbio;
1090 struct amdgpu_hdp hdp;
1093 struct amdgpu_smuio smuio;
1096 struct amdgpu_mmhub mmhub;
1099 struct amdgpu_gfxhub gfxhub;
1102 struct amdgpu_gfx gfx;
1105 struct amdgpu_sdma sdma;
1108 struct amdgpu_lsdma lsdma;
1111 struct amdgpu_uvd uvd;
1114 struct amdgpu_vce vce;
1117 struct amdgpu_vcn vcn;
1120 struct amdgpu_jpeg jpeg;
1123 struct amdgpu_vpe vpe;
1126 struct amdgpu_umsch_mm umsch_mm;
1127 bool enable_umsch_mm;
1130 struct amdgpu_firmware firmware;
1133 struct psp_context psp;
1136 struct amdgpu_gds gds;
1139 struct amdgpu_seq64 seq64;
1142 struct amdgpu_kfd_dev kfd;
1145 struct amdgpu_umc umc;
1148 struct amdgpu_display_manager dm;
1152 struct amdgpu_isp isp;
1156 bool enable_mes;
1157 bool enable_mes_kiq;
1158 bool enable_uni_mes;
1159 struct amdgpu_mes mes;
1160 struct amdgpu_mqd mqds[AMDGPU_HW_IP_NUM];
1161 const struct amdgpu_userq_funcs *userq_funcs[AMDGPU_HW_IP_NUM];
1167 struct xarray userq_xa;
1170 struct amdgpu_df df;
1173 struct amdgpu_mca mca;
1176 struct amdgpu_aca aca;
1179 struct amdgpu_cper cper;
1181 struct amdgpu_ip_block ip_blocks[AMDGPU_MAX_IP_NUM];
1182 uint32_t harvest_ip_mask;
1183 int num_ip_blocks;
1184 struct mutex mn_lock;
1188 atomic64_t vram_pin_size;
1189 atomic64_t visible_pin_size;
1190 atomic64_t gart_pin_size;
1193 uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
1194 struct amdgpu_ip_map_info ip_map;
1197 struct delayed_work delayed_init_work;
1199 struct amdgpu_virt virt;
1202 bool has_hw_reset;
1203 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
1206 bool in_suspend;
1207 bool in_s3;
1208 bool in_s4;
1209 bool in_s0ix;
1210 suspend_state_t last_suspend_state;
1212 enum pp_mp1_state mp1_state;
1213 struct amdgpu_doorbell_index doorbell_index;
1215 struct mutex notifier_lock;
1217 int asic_reset_res;
1218 struct work_struct xgmi_reset_work;
1219 struct list_head reset_list;
1221 long gfx_timeout;
1222 long sdma_timeout;
1223 long video_timeout;
1224 long compute_timeout;
1225 long psp_timeout;
1227 uint64_t unique_id;
1228 uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
1231 bool in_runpm;
1232 bool has_pr3;
1234 bool ucode_sysfs_en;
1236 struct amdgpu_fru_info *fru_info;
1237 atomic_t throttling_logging_enabled;
1238 struct ratelimit_state throttling_logging_rs;
1239 uint32_t ras_hw_enabled;
1240 uint32_t ras_enabled;
1241 bool ras_default_ecc_enabled;
1243 bool no_hw_access;
1244 struct pci_saved_state *pci_state;
1245 pci_channel_state_t pci_channel_state;
1247 struct amdgpu_pcie_reset_ctx pcie_reset_ctx;
1250 bool barrier_has_auto_waitcnt;
1252 struct amdgpu_reset_control *reset_cntl;
1253 uint32_t ip_versions[MAX_HWIP][HWIP_MAX_INSTANCE];
1255 bool ram_is_direct_mapped;
1257 struct list_head ras_list;
1259 struct ip_discovery_top *ip_top;
1261 struct amdgpu_reset_domain *reset_domain;
1263 struct mutex benchmark_mutex;
1265 bool scpm_enabled;
1266 uint32_t scpm_status;
1268 struct work_struct reset_work;
1270 bool dc_enabled;
1272 uint32_t aid_mask;
1275 bool debug_vm;
1276 bool debug_largebar;
1277 bool debug_disable_soft_recovery;
1278 bool debug_use_vram_fw_buf;
1279 bool debug_enable_ras_aca;
1280 bool debug_exp_resets;
1281 bool debug_disable_gpu_ring_reset;
1282 bool debug_vm_userptr;
1283 bool debug_disable_ce_logs;
1307 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev, in amdgpu_ip_version() argument